M68HC08 datasheet(126/288 Pages) FREESCALE

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Timer Interface Module (TIM)

Data Sheet

MC68HC908BD48 — Rev. 2.1

126

Timer Interface Module (TIM)

Freescale Semiconductor

10.2 Introduction

This section describes the timer interface module (TIM2, version B). The

TIM is a two-channel timer that provides a timing reference with input

capture, output compare, and pulse-width-modulation functions. Figure

10-1 is a block diagram of the TIM.

10.3 Features

Features of the TIM include the following:

•

Two input capture/output compare channels

–

Rising-edge, falling-edge, or any-edge input capture trigger

–

Set, clear, or toggle output compare action

•

Buffered and unbuffered pulse width modulation (PWM) signal

generation

•

Programmable TIM clock input with 7-frequency internal bus clock

prescaler selection

•

Free-running or modulo up-count operation

•

Toggle any channel pin on overflow

•

TIM counter stop and reset bits

NOTE:

TCH1 (timer channel 1) is not bonded to an external pin on this MCU.

Therefore, any references to the timer TCH1 pin in the following text

should be interpreted as not available — but the internal status and

control registers are still available.

10.4 Pin Name Conventions

The TIM share one I/O pin with one port E I/O pin. The full name of the

TIM I/O pin is listed in Table 10-1

. The generic pin name appear in the

text that follows.

Table 10-1. Pin Name Conventions

TIM Generic Pin Names:

TCH0

TCH1

Full TIM Pin Names:

PTE0/SOG/TCH0

Not Available

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