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M68HC08 Datasheet(PDF) 129 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 129 Page - Freescale Semiconductor, Inc |
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129 / 288 page ![]() Timer Interface Module (TIM) MC68HC908BD48 — Rev. 2.1 Data Sheet Freescale Semiconductor Timer Interface Module (TIM) 129 10.5.1 TIM Counter Prescaler The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock rates from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM status and control register (TSC) select the TIM clock source. 10.5.2 Input Capture With the input capture function, the TIM can capture the time at which an external event occurs. When an active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter into the TIM channel registers, TCHxH:TCHxL. The polarity of the active edge is programmable. Input captures can generate TIM CPU interrupt requests. 10.5.3 Output Compare With the output compare function, the TIM can generate a periodic pulse with a programmable polarity, duration, and frequency. When the counter reaches the value in the registers of an output compare channel, the TIM can set, clear, or toggle the channel pin. Output compares can generate TIM CPU interrupt requests. $0014 TIM Channel 1 Register High (TCH1H) Read: Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Write: Reset: Indeterminate after reset $0015 TIM Channel 1 Register Low (TCH1L) Read: Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Write: Reset: Indeterminate after reset = Unimplemented |
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