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DS2155 Datasheet(PDF) 61 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 61 Page - Dallas Semiconductor |
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61 / 238 page  DS2155 61 of 238 Table 10-B. E1 Alarm Criteria ALARM SET CRITERIA CLEAR CRITERIA ITU SPECIFICATION RLOS An RLOS condition exists on power-up prior to initial synchronization, when a resync criteria has been met, or when a manual resync has been initiated by E1RCR1.0 RCL 255 or 2048 consecutive 0s received as determined by E1RCR2.0 At least 32 1s in 255-bit times are received G.775/G.962 RRA Bit 3 of nonalign frame set to 1 for three consecutive occasions Bit 3 of nonalign frame set to 0 for three consecutive occasions O.162 2.1.4 RUA1 Fewer than three 0s in two frames (512 bits) More than two 0s in two frames (512 bits) O.162 1.6.1.2 RDMA Bit 6 of time slot 16 in frame 0 has been set for two consecutive multiframes V52LNK Two out of three Sa7 bits are 0 G.965 |
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