CDCE949 datasheet(26/31 Pages) TI

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HISTORY

CDCE949

CDCEL949

SCAS844 – JUNE 2007

Data sheet

Modified by

Date

Modified Content

Revision

0.10

Georg Becke

18, May 2006

Created initial Specification;

0.11

Georg Becke

26, May 2006

Added updates according the Spec’ Review Meeting held 5/19/2006;

0.20

Georg Becke

31, May 2006

Version for Plan-DPR;

0.21

Georg Becke

9, Jun 2006

Updated SDA/SCL 2-wire interface specification; block-diagrams, pin-assignments

0.22

Georg Becke

20, Jul 2006

Updated control register setting; change pull-up value of S0, S1, S2 to 500Kohm to be

conform with I2C spec’; updated Register Configuration Bitmap; added default device

configuration;

0.25

Georg Becke

24, Jul 2006

Created CDCE949 datasheet from CDCE9xx version 0.22;

0.26

Georg Becke

28, Jul 2006

Added SDA/SCL Configuration Register definition and bit assignment;

0.27

Georg Becke

15, Sep 2006

Added low/high-speed VCO mode to configuration register (2-bit = 4 options); added

CDCEL949; modified Configuration Register; updated address bits and PLL dividers in

conf reg.; added 50 Ohm termination load;

0.28

Georg Becke

25, Oct 2006

Add 1.8V outputs to head-line; updated Iil for S0/1/2 to -4uA; modified configuration

registers and changed “acronym” to be more readable; re-arranged bits/bytes in

generic configuration register; added PLL frequency calculation; described that

EELOCK and SPICON is valid only if written into the EEPROM; changed block

diagrams to show “EEPROM-Block”;

0.29

Georg Becke

21, Nov 2006

Added 500K pull-up to SDA/SCL input; added div-by-0 (=reset) to post-dividers

function; corrected calculation of “R” for 30-bit PLL divider; corrected default setting for

Yn on page 12; change order of freq-select and SSC-select in the tables (ETC

request)

→ no change in Control registers; add 1 bit for E vs EL identification; made

some word adjustment to some text sections;

0.30

Georg Becke

8, Dec 2006

Added “not write beyond 50h” (note 1); added CL description (note 8); change note 9

– EEWRITE; modified Yx default setting; added Vdd pin 13 to Terminal Functions;

added “not overwrite” to reserved bits; changed acronyms for Yx_STy;

0.31

Georg Becke

19, Dec 2006

Updated first three pages; forwarded version 0.31 to TIS;

0.32

Georg Becke

15. Feb 2007

General Update at feature block, terminal function, Vi, X-tal-Spec, SDA-Hold-time,

Ctrl-terminal Register, bit-map description (generic, PLL1, PLL2, PLL3, PLL4), load

cap drawing and relevant note, PLL frequency calculation

0.33

Georg Becke

11. Apr 2007

Added "Block Read" comment; changed slave adr bits;

0.4

Georg Becke

11. May 2007

Char&ATE Review

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CDCE949 Datasheet(PDF) 26 Page - Texas Instruments

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