AN221E04 Datasheet – Dynamically Reconfigurable FPAA With Enhanced I/O
DS030100-U006a - 12 -
CAB (Configurable Analog Block) Differential Operational Amplifier
Parameter
Symbol
Min
Typ
Max
Unit
Comment
High Precision Input/Output
Range c
Vinouta
0.5
-
3.5
V
VMR +/- 1.5v
Standard Precision Input/Output
Range d
Vinouta
0.1
-
3.9
V
VMR +/-1.9v
High Precision.
Differential Input/Output c
Vdiffioa
-
-
+/-3.0
V
Common mode voltage = 2 V
Standard Precision
Differential Input/Output d
Vdiffioa
-
-
+/-3.8
V
Common mode voltage = 2 V
Common Mode Input Voltage
Range d
Vcm
0
2.0
4
V
Common Mode Output Voltage
Range
Vcm
1.9
2.0
2.1
V
Equivalent Input Voltage Offset.
Voffset
0.1
5
15
mV
Some CAMs (Configurable
Analog Modules) can inherently
compensate
Offset Voltage Temperature
Coefficient
Voffsettc
-
1
10
µV/°C
from -40°C to 125°C some
CAMs (Configurable Analog
Modules) can inherently
compensate
Power Supply Rejection Ratio
PSSR
-
80
-
dB
Variation between CAMs is
expected because of variations
in architecture
Common Mode Rejection Ratio
CMRR
-
77
-
dB
Example 1 GainInv CAM
CAM clock = 1MHz
CAM parameter settings
Gain = 1
Common Mode Rejection Ratio
CMRR
-
60
-
dB
Example 2 Filterbiquad
Setting = Low pass filter
CAM clock = 1MHz
CAM parameter settings
Gain = 1,
Corner frequency = 50KHz
Quality Factor = 0.707
Differential Slew Rate, Internal
Slew
-
50
-
V/µsec
Applicable when the OpAmp
load is internal to the FPAA
Differential Slew Rate, External
Slew
-
10
-
V/µsec
Applicable when the OpAmp
driving signal out of the FPAA
package
Unity Gain Bandwidth,
Full Power Mode.
UGB
-
50
-
MHz
Applicable when sourcing and
loading the OpAmp with a load
internal to the FPAA
Input Impedance, Internal
Rin
10
-
-
Mohm
Output Impedance, Internal
Rout
-
-
-
Ohms
The OpAmp output is designed
to drive all internal nodes, these
are dominantly capacitive loads
Output Impedance, External
Rout
-
-
-
Ohms
Output to an FPAA output pin
(ouput cell bypass mode). This
variable is influenced by CAB
capacitor size, CAB clock
frequency and CAB architecture
Output Load, External c e
Rload
0.1
-
-
Mohm
Output Load, External c e
Cload
-
-
50
pF
Output Load, External d e f
Rload
1
10
-
Kohm
Additional loading causes
internal voltage drops across
output stage and series
resistances
The output stage has a small
signal output impedance of
approx 10ohm
Output Load, External d e f
Cload
-
-
50
pF
Noise Figure g
Noise
-
0.13
-
µV/sqrtHz
Example1 GainInv CAM
CAM clock = 1MHz
Gain = 1
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