DS3105 datasheet(3/110 Pages) MAXIM

3 / 110 page

Preliminary. Subject to Change Without Notice.

DS3105

Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.

3 of 110

7.8

Output Clock Configuration ....................................................................................................................... 31

7.8.1

Signal Format Configuration......................................................................................................... 31

7.8.2

Frequency Configuration .............................................................................................................. 31

7.9

Frame and Multiframe Alignment .............................................................................................................. 38

7.9.1

Sampling....................................................................................................................................... 38

7.9.2

Resampling................................................................................................................................... 39

7.9.3

Enable .......................................................................................................................................... 39

7.9.4

Qualification.................................................................................................................................. 39

7.9.5

Output Clock Alignment................................................................................................................ 39

7.9.6

Frame Sync Monitor ..................................................................................................................... 39

7.9.7

SYNCn Pins.................................................................................................................................. 40

7.9.8

Other Configuration Options......................................................................................................... 40

7.10 Microprocessor Interface ........................................................................................................................... 41

7.11 Reset Logic................................................................................................................................................ 43

7.12 Power-Supply Considerations ................................................................................................................... 43

7.13 Initialization................................................................................................................................................ 43

REGISTER DESCRIPTIONS.............................................................................................................................. 44

8.1

Status Bits ................................................................................................................................................. 44

8.2

Configuration Fields................................................................................................................................... 44

8.3

Multi-Register Fields.................................................................................................................................. 44

8.4

Register Definitions ................................................................................................................................... 45

JTAG TEST ACCESS PORT AND BOUNDARY SCAN..................................................................................... 93

9.1

JTAG Description ...................................................................................................................................... 93

9.2

JTAG TAP Controller State Machine Description ..................................................................................... 93

9.3

JTAG Instruction Register and Instructions............................................................................................... 95

9.4

JTAG Test Registers ................................................................................................................................. 96

10 ELECTRICAL CHARACTERISTICS ................................................................................................................... 97

10.1 DC Characteristics..................................................................................................................................... 97

10.2 Input Clock Timing................................................................................................................................... 100

10.3 Output Clock Timing ................................................................................................................................ 100

10.4 SPI Interface Timing ................................................................................................................................ 101

10.5 JTAG Interface Timing............................................................................................................................. 102

10.6 Reset Pin Timing ..................................................................................................................................... 103

11 PIN ASSIGNMENTS ......................................................................................................................................... 104

12 MECHANICAL INFORMATION ........................................................................................................................ 106

13 ACRONYMS AND ABBREVIATIONS............................................................................................................... 108

14 DATA SHEET REVISION HISTORY ................................................................................................................ 109

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