DS786A1

15

CS4412A

4.3

Output Mode Configuration

Each OUTx pin will switch in association with the corresponding INx pin. For most configurations, OUTx will

be non-inverted from INx; however, some INx pins can be configured for internal inversion to allow one

PWM input to drive both the positive and negative sides of a full-bridge output. Unused OUTx pins must

have their corresponding INx pin tied to ground.

Table 3 shows the setting of the CNFG[2:0] inputs and the corresponding mode of operation. These pins

should remain static during operation (RST12 or RST34 set high).

In Stereo Half-Bridge & Mono Full-Bridge configurations, the PWM Popguard Transient Control will only af-

fect the two half-bridge outputs, OUT1 and OUT2. The full-bridge output will not ramp regardless of the state

of the RAMP pin. See Section 4.2.1 on page 13 for more details about PWM Popguard Transient Control.

CNFG2 CNFG1 CNFG0

Description

Necessary Input Connections

00

0

Stereo Full-Bridge

Tied Loads

IN1 must provide the PWM data for the first full-bridge.

IN2 must be inverted from IN1 for full-bridge operation.

IN3 must provide the PWM data for the second full-bridge.

IN4 must be inverted from IN3 for full-bridge operation.

00

1

Stereo Half-Bridge

& Mono Full-Bridge

Tied Loads*

IN1 must provide the PWM data for the first half-bridge.

IN2 must provide the PWM data for the second half-bridge.

IN3 must provide the PWM data for the mono full-bridge.

IN4 must be inverted from IN3 for full-bridge operation.

01

0

Mono Parallel Full-

Bridge Tied Load

IN1 must provide the PWM data for the mono full-bridge.

IN2 must be wired directly to IN1 for parallel full-bridge operation.

IN3 must be inverted from IN1 for parallel full-bridge operation.

IN4 must be wired to IN3 for parallel full-bridge operation.

01

1

Quad Half-Bridge

Tied Loads

IN1 must provide the PWM data for the first half-bridge.

IN2 must provide the PWM data for the second half-bridge.

IN3 must provide the PWM data for the third half-bridge.

IN4 must provide the PWM data for the fourth half-bridge.

10

0

Stereo Full-Bridge

Tied Loads

With Inversion

IN1 must provide the PWM data for the first full-bridge.

IN2 must be wired to IN1; the CS4412A will internally invert IN2.

IN3 must provide the PWM data for the second full-bridge.

IN4 must be wired to IN3; the CS4412A will internally invert IN4.

10

1

Stereo Half-Bridge

& Mono Full-Bridge

Tied Loads

With Inversion*

IN1 must provide the PWM data for the first half-bridge.

IN2 must provide the PWM data for the second half-bridge.

IN3 must provide the PWM data for the mono full-bridge.

IN4 must be wired to IN3; the CS4412A will internally invert IN4.

11

0

Mono Parallel Full-

Bridge Tied Load

With Inversion

IN1 must be provided for half-bridge operation.

IN2 must be wired to IN1 for parallel full-bridge operation.

IN3 must be wired to IN1; the CS4412A will internally invert IN3.

IN4 must be wired to IN1; the CS4412A will internally invert IN4.

1

1

1

Reserved

The input connections are not applicable.

* PWM Popguard Transient Control only affects OUT1 and OUT2.

Table 3. Output Mode Configuration Options