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PM5366-PI Datasheet(PDF) 124 Page - PMC-Sierra, Inc |
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PM5366-PI Datasheet(HTML) 124 Page - PMC-Sierra, Inc |
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124 / 267 page ![]() PRELIMINARY PM5366 TEMAP-84 DATASHEET PMC-2010672 ISSUE 1 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER PROPRIETARY AND CONFIDENTIAL 112 data. For 34.368 Mbit/s or 44.736 Mbit/s data streams there is also the option of using timing link rate adjustments provided from the source and carried with the links over the SBI bus. A T1/E1 tributary may be transmitted at a rate different from that of the SBI bus if the tributary is looped timed, locked to the CTCLK input or locked to a selected recovered clock. In this case, the frame slip buffer (ELST) must be used to adapt the data rate. The 44.736 Mbit/s or 34.368 Mbit/s clock is synthesized from the 51.84 MHz or 44.928 MHz reference clock, CLK52M. Using either reference clock frequency, the 44.736 Mbit/s or 34.368 Mbit/s rate is generated by gapping the reference clock in a fixed way. Timing adjustments are performed by adding or deleting four clocks over the 500 µS period. When the TEMAP-84 is the SBI egress clock master for a link, clocks are sourced from within the TEMAP-84. The data rate is set by the frequency of the CTCLK input, one of the three recovered clocks (RECVCLK1, RECVCLK2, or RECVCLK3) or the tributary receive clock if loop timed. Based on buffer fill levels, the EXSBI sends link rate adjustment commands to the link source indicating that it should send one additional or one fewer bytes of data during the next 500 µS interval. Failure of the source to respond to these commands will ultimately result in overflows or underflows which can be configured to generate per link interrupts. Channelized T1s extracted from the SBI bus optionally have the channel associated signaling (CAS) bits explicitly defined and carried in parallel with the DS0s. 9.34 Insert Scaleable Bandwidth Interconnect (INSBI) The Insert Scaleable Bandwidth Interconnect block maps up to 84 1.544 Mbit/s links, 63 2.048 Mbit/s links, three 44.736 Mbit/s links, three 34.386 Mbit/s links or an arbitary bit rate into the SBI shared bus. The SBI bandwidth is evenly divided into three SPEs, each of which may carry a different payload type. The 1.544 Mbit/s links will be unframed when sourced directly from the DS3 multiplexer or SONET/SDH bit asynchronous mapper, or they can be T1 channelized when sourced by the SONET/SDH byte synchronous mapper. The 2.048 Mbit/s links will be unframed when sourced directly from the SONET/SDH bit asynchronous mapper or G.747 demultiplexer, or they can be E1 channelized when sourced by the SONET/SDH byte synchronous mapper. The 44.736 Mbit/s links and 34.368 Mbit/s links can also be unframed when sourced directly from the DS3/E3 interfaces or from the DS3 mapper. The 44.736 Mbit/s links and 34.368 Mbit/s links can be unchannelized DS3/E3s when sourced from the DS3 or E3 framers. Finally, an arbitrary bandwidth signal that has been received |
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