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PM5366-PI Datasheet(PDF) 153 Page - PMC-Sierra, Inc |
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PM5366-PI Datasheet(HTML) 153 Page - PMC-Sierra, Inc |
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153 / 267 page ![]() PRELIMINARY PM5366 TEMAP-84 DATASHEET PMC-2010672 ISSUE 1 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER PROPRIETARY AND CONFIDENTIAL 141 HIZIO: The HIZIO bit controls the tri-state modes of the output pins of the TEMAP- 84. While the HIZIO bit is a logic 1, all output pins of the TEMAP-84, except the data bus, are held in a high-impedance state. The microprocessor interface is still active. HIZDATA: The HIZDATA bit controls the tri-state modes of the TEMAP-84. While the HIZIO bit is a logic 1, all output pins of the TEMAP-84, except the data bus, are held in a high-impedance state. While the HIZDATA bit is a logic 1, the data bus is held in a high-impedance state which inhibits microprocessor read cycles. |
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