PM6388 datasheet(49/345 Pages) PMC

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PM6388 EOCTL

DATA SHEET

PMC-1971019

ISSUE 6

OCTAL E1 FRAMER

PROPRIETARY and CONFIDENTIAL to PMC-Sierra Inc. and for its customers’ internal use

The block declares loss of signaling multiframe alignment if two consecutive

signaling multiframe alignment signals have been received in error, or additionally, if

all the bits in TS16 are logic 0 for 1 or 2 (selectable) signaling multiframes. Loss of

signaling multiframe alignment is also declared if basic frame alignment has been

lost.

National Bits Extraction

The E1-FRMR extracts and assembles the sub-multiframe aligned National bit

codewords Sa4[1:4] to Sa8[1:4]. The corresponding register values are updated

upon generation of the CRC sub-multiframe interrupt.

This block also detects the V5.2 link ID signal, which is defined as the event where 2

out of 3 Sa7 bits are logic 0. Upon reception of this Link ID signal, the V52LINK

output is asserted. This signal is cleared when 2 out of 3 Sa7 bits are a logic one.

Alarm Integration

The E1-FRMR monitors the OOF and the AISD indications, verifying that each

condition has persisted for 104 ms (±6 ms) before indicating the alarm condition.

The alarm is removed when the condition has been absent for 104 ms (±6 ms).

The AIS Alarm algorithm accumulates the occurrences of AISD over a 4 ms interval

and indicates a valid AIS presence when 13 or more AISD indications have been

received. Each interval with a valid AIS presence indication increments an interval

counter which declares AIS Alarm when 25 valid intervals have been accumulated.

An interval with no valid AIS presence indication decrements the interval counter;

the AIS Alarm declaration is removed when the counter reaches 0. This algorithm

provides a 99.8% probability of declaring an AIS Alarm in the presence of a 10-3

mean bit error rate.

The RED Alarm algorithm monitors occurrences of OOF over a 4 ms interval,

indicating a valid OOF interval when one or more OOF indications occurred during

the interval, and indicating a valid in frame (INF) interval when no OOF indication

occurred for the entire interval. Each interval with a valid OOF indication increments

an interval counter which declares RED Alarm when 25 valid intervals have been

accumulated. An interval with valid INF indication decrements the interval counter;

the RED Alarm declaration is removed when the counter reaches 0. This algorithm

biases OOF occurrences, leading to declaration of RED Alarm when intermittent

loss of frame alignment occurs.

9.2

Performance Monitor Counters (PMON)

The Performance Monitor Counters function is provided by the PMON block. The

block accumulates CRC error events, Frame Synchronization bit error events, and

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