PM6388 datasheet(71/345 Pages) PMC

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PM6388 EOCTL

DATA SHEET

PMC-1971019

ISSUE 6

OCTAL E1 FRAMER

PROPRIETARY and CONFIDENTIAL to PMC-Sierra Inc. and for its customers’ internal use

NORMAL MODE REGISTER DESCRIPTION

Normal mode registers are used to configure and monitor the operation of the

EOCTL. Normal mode registers (as opposed to test mode registers) are

selected when A[10] is low.

Notes on Normal Mode Register Bits:

1. Writing values into unused register bits has no effect. However, to ensure

software compatibility with future, feature-enhanced versions of the product,

unused register bits must be written with logic zero. Reading back unused

bits can produce either a logic one or a logic zero; hence, unused register bits

should be masked off by software when read.

2. All configuration bits that can be written into can also be read back. This

allows the processor controlling the EOCTL to determine the programming

state of the block.

3. Writable normal mode register bits are cleared to logic zero upon reset unless

otherwise noted.

4. Writing into read-only normal mode register bit locations does not affect

EOCTL operation unless otherwise noted.

5. Certain register bits are reserved. These bits are associated with megacell

functions that are unused in this application. To ensure that the EOCTL

operates as intended, reserved register bits must only be written with logic

zero. Similarly, writing to reserved registers should be avoided.

PM6388 Datasheet(PDF) 71 Page - PMC-Sierra, Inc