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ADAQ7980 Datasheet(PDF) 32 Page - Analog Devices

Part # ADAQ7980
Description  Quad, 14-Bit, 4 MSPS, Simultaneous Sampling, μModule Data Acquisition Solution
PDF  45 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADAQ7980 Datasheet(HTML) 32 Page - Analog Devices

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Data Sheet
ADAQ4381-4
ADC MODES OF OPERATION
analog.com
Rev. 0 | 32 of 45
Rolling Average Oversampling
Rolling average oversampling mode can be used in applications
where higher output data rates are required and where a higher
SNR or dynamic range is required. Rolling averaging involves
taking a number of samples, adding them together, and dividing
the result by the number of samples taken. This result is then
output from the device. The sample data is not cleared when the
process completes. The rolling oversampling mode uses a first in,
first out (FIFO) buffer of the most recent samples in the averaging
calculation, which allows the ADC throughput rate and output data
rate to stay the same.
Rolling average oversampling mode is configured by setting the
OS_MODE bit to Logic 1 and having a valid nonzero value in the
OSR bits. The oversampling ratio of the digital filter is controlled
using the oversampling bits, OSR (see Table 11).
Table 11 provides the oversampling bit decoding to select the
different oversample rates. The output result is decimated to 16-bit
resolution for the ADAQ4381-4. If additional resolution is required,
then this can be achieved by configuring the resolution boost bit in
the Configuration1 Register. For more details, see the Resolution
Boost section.
In rolling average oversampling mode, all ADC conversions are
controlled and initiated by the falling edge of CS. When a conver-
sion is complete, the result is loaded into the FIFO. The FIFO
length is 8 regardless of the oversampling ratio set. The FIFO is
filled on the first conversion after a power-on-reset (POR), on the
first conversion after a software controlled hard or soft reset. A new
conversion result is shifted into the FIFO on completion of every
ADC conversion regardless of the status of the OSR bits and the
OS_MODE bit. This conversion allows a seamless transition from
no oversampling to rolling average oversampling, or different rolling
average oversampling ratios without waiting for the FIFO to fill.
The number of samples, n, defined by the OSR bits are taken from
the FIFO, added together and the result is divided by n.
Table 11. Rolling Average Oversampling Overview, G = 1
OSR [2:0]
OS Ratio
SNR (dB typical)
Data Output Rate (kSPS max)
RES = 0
RES = 1
000
No OS
85.0
85.0
4000
001
2
85.0
87.1
4000
010
4
85.1
90.0
4000
011
8
85.4
92.4
4000
110
Invalid
N/A1
N/A1
N/A1
111
Invalid
N/A1
N/A1
N/A1
1 N/A means not applicable.
Figure 67. Rolling Average Oversampling Mode Operation



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