Data Sheet

LT8615

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Rev 0

23 of 31

INTVCC Regulator

An internal low dropout (LDO) regulator produces the 3.5V supply from VIN that powers the drivers and the internal

bias circuitry. The INTVCC can supply enough current for the LT8615’s circuitry and must be bypassed to ground with

a minimum of 1μF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by

the power MOSFET gate drivers. Applications with high input voltage and high switching frequency increase die

temperature because of the higher power dissipation across the LDO. Do not connect an external load to the INTVCC

pin.

Output Voltage Tracking and Soft-Start

The LT8615 allows the user to program its output voltage ramp rate with the TR/SS pin. An internal 2μA pulls up the

TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft-starting the output to prevent current surge

on the input supply. During the soft-start ramp, the output voltage proportionally tracks the TR/SS pin voltage. For

output tracking applications, TR/SS can be externally driven by another voltage source. From 0V to 0.787V, the TR/SS

voltage overrides the internal 0.787V reference input to the error amplifier, thus regulating the FB pin voltage to that

of the TR/SS pin. When TR/SS is above 0.787V, tracking is disabled, and the feedback voltage regulates to the internal

reference voltage.

An active pull-down circuit is connected to the TR/SS pin, which discharges the external soft-start capacitor in the

case of fault conditions and restarts the ramp when the faults are cleared. Fault conditions that clear the soft-start

capacitor are the EN/UV pin transitioning low, VIN voltage falling too low, or thermal shutdown

Output Power Good

When the LT8615’s output voltage is within the ±8% window of the regulation point, the output voltage is considered

good, and the open-drain PG pin goes high impedance, and is typically pulled high with an external resistor.

Otherwise, the internal pull-down device pulls the PG pin low. To prevent glitching both the upper and lower

thresholds, include 0.5% of hysteresis.

The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTVCC has fallen too

low, VIN is too low, or thermal shutdown.

Synchronization

To select low ripple Burst Mode operation, tie the SYNC pin below 0.4V (this can be ground or a logic low output). To

synchronize the LT8615 oscillator to an external frequency, connect a square wave to the SYNC pin. The square wave

amplitude should have values below 0.4V and peaks above 1.5V (up to 5V). The square wave’s duty cycle can be as

low as with minimum peaks of 50ns or as high as with minimum valleys of 50ns.

The LT8615 does not enter Burst Mode operation at low output loads while synchronized to an external clock, but

instead pulse skips to maintain regulation. The LT8615 may be synchronized over a 400kHz to 2.5MHz range. The RT

resistor should be chosen to set the LT8615 switching frequency equal to or below the lowest synchronization input.

For example, if the synchronization signal is 2MHz or higher, the RT is selected for 2MHz. The slope compensation is

set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is

established by the inductor size, input voltage, and output voltage. Since the synchronization frequency does not

change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations

at the frequency set by RT, then the slope compensation is sufficient for all synchronization frequencies.

For some applications, it is desirable for the LT8615 to operate in pulse-skipping mode. Pulse-skipping mode offers

two major differences from Burst Mode operation. First, the clock stays awake always and all switching cycles are