SN8F27E64LKB datasheet(96/192 Pages) SONIX

96 / 192 page

SN8F27E60 Series

8-Bit Flash Micro-Controller with Embedded ICE and ISP

SONiX TECHNOLOGY CO., LTD

Page 96

Version 1.4

8.3.7 TC0 EVENT COUNTER

TC0 event counter is set the TC0 clock source from external input pin (P0.0). When TC0CKS1=1, TC0 clock source is

switch to external input pin (P0.0). TC0 event counter trigger direction is falling edge. When one falling edge occurs,

TC0C will up one count. When TC0C counts from 0xFF to 0x00, TC0 triggers overflow event. The external event

counter input pin’s wake-up function of GPIO mode is disabled when TC0 event counter function enabled to avoid

event counter signal trigger system wake-up and not keep in power saving mode. The external event counter input

pin’s external interrupt function is also disabled when TC0 event counter function enabled, and the P00IRQ bit keeps

“0” status. The event counter usually is used to measure external continuous signal rate, e.g. continuous pulse, R/C

type oscillating signal

…These signal phase don’t synchronize with MCU’s main clock. Use TC0 event to measure it

and calculate the signal rate in program for different applications.

0x00

or TC0R

...

External Input Signel

TC0C

TC0IRQ

TC0 timer overflows. TC0IRQ set as “1”.

Reload TC0C from TC0R automatically.

TC0IRQ is cleared by program.

0x01

0x02

0x03

0xFE

0xFF

TC0R

...

8.3.8 PULSE WIDTH MODULATION (PWM)

The PWM is duty/cycle programmable design to offer various PWM signals. When TC0 timer enables and PWM0OUT

bit sets as

“1” (enable PWM output), the PWM output pin (P5.1) outputs PWM signal. One cycle of PWM signal is high

pulse first, and then low pulse outputs. TC0R register controls the cycle of PWM, and TC0D decides the duty (high

pulse width length) of PWM. TC0C initial value is TC0R reloaded when TC0 timer enables and TC0 timer overflows.

When TC0C count is equal to TC0D, the PWM high pulse finishes and exchanges to low level. When TC0 overflows

(TC0C counts from 0xFF to 0x00), one complete PWM cycle finishes. The PWM exchanges to high level for next cycle.

The PWM is auto-reload design to load TC0C from TC0R automatically when TC0 overflows and the end of PWM

’s

cycle, to keeps PWM continuity. If modify the PWM cycle by program as PWM outputting, the new cycle occurs at next

cycle when TC0C loaded from TC0R.

TC0R

TC0C

...

TC0D

-2

TC0D

-1

TC0D

PWM Output

...

0xFD

0xFE

0xFF

TC0R

...

Enable TC0 and PWM.

TC0C is loaded from TC0R.

PWM outputs high status.

TC0C = TC0D.

PWM exchanges to low status.

TC0C overflows from 0xFF to 0x00.

TC0C is loaded from TC0R.

PWM exchanges to high status.

One complete cycle of PWM.

Next cycle.

The resolution of PWM is decided by TC0R. TC0R range is from 0x00~0xFF. If TC0R = 0x00, PWM

’s resolution is

1/256. If TC0R = 0x80, PWM

’s resolution is 1/128. TC0D controls the high pulse width of PWM for PWM’s duty. When

TC0C = TC0D, PWM output exchanges to low status. TC0D must be greater than TC0R, or the PWM signal keeps low

status. When PWM outputs, TC0IRQ still actives as TC0 overflows, and TC0 interrupt function actives as TC0IEN = 1.

But strongly recommend be careful to use PWM and TC0 timer together, and make sure both functions work well.

The PWM output pin is shared with GPIO and switch to output PWM signal as PWM0OUT=1 automatically. If

PWM0OUT bit is cleared to disable PWM, the output pin exchanges to last GPIO mode automatically. It easily to

implement carry signal on/off operation, not to control TC0ENB bit.

SN8F27E64LKB Datasheet(PDF) 96 Page - SONiX Technology Company

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