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PT4316 V1.6

- 14 -

August, 2007

Low Power 315/433 MHz OOK/ASK Superheterodyne

Receiver with SAW-based Oscillator

PT4316

PCB LAYOUT CONSIDERATION

Proper PCB layout is extremely critical in achieving good RF performance. At the very least, using a

two-layer PCB is strongly recommended, so that one layer may incorporate a continuous ground plane.

A large number of via holes should connect the ground plane areas between the top and bottom layers.

Note that if the PCB design incorporates a printed loop antenna, there should be no ground plane

beneath the antenna.

Within the PT4316, the power supply rails of the LNA and others blocks should be separated for

improving the isolation and minimizing the noise coupling effects. Careful consideration must also be

paid to the supply power and ground at the board level. The larger ground area plane should be placed

as close as possible to the VSS and VSSLNA pins. To reduce supply bus noise coupling, sensitive

blocks such as the LNA or mixer should be biased thru separated power supply traces, incorporating

series-R, shunt-C filtering as the following figure.

If the power source is capable of supplying a stable voltage, C’ may be ignored. In some applications,

the DC source may be supplied from a simple AC-DC transformer. In such cases, the DC voltage level

could be unstable and may adversely affect ASK/OOK receiver sensitivity. A solution may be to

increase C to an appropriately large value while continuing to make the power source as stable as

possible.

Finally, in an RF system, it is extremely important to keep the LNA or RF signal traces away from large

voltage swing signals and digital data signal traces to avoid unnecessary interference.