Data Sheet

LTC9101-2B/LTC9102

ELECTRICAL CHARACTERISTICS

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Rev. 0 | 9 of 39

Note 10: If a fault condition occurs during an I2C transaction, the INT pin will not be pulled down until a stop condition is present on the I2C bus.

Note 11: Load characteristics of the LTC9102 during Mark: 7V < (AGND – VOUTn) < 10V

Note 12: See the LTC9101-2B Software Interface guide for information on serial bus usage and device configuration and status registers.

Note 13: Do not source or sink current from CAP1, CAP2, CAP3 and CAP4.

Note 14: Port current and port power measurements depend on sense resistor value (0.1Ω typical). See the External Component Selection

section for details.

Note 15: See the Inrush Control section for details on inrush threshold selection.

Note 16: ADC characteristics and typical performance are described in terms of LTC9102 hardware capability. Measurements from LTC9102

are processed and synthesized by the LTC9101-2B. See LTC9101-2B Software Interface guide for register descriptions and LSB weights, as

presented to the user (port current, port voltage, VEE voltage, and system temperature).