LTC4292 datasheet(27/39 Pages) AD

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Data Sheet

LTC9101-2B/LTC9102

APPLICATIONS INFORMATION

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Rev. 0 | 27 of 39

The TLIM register is used to adjust the tLIM setting for each channel

and is a minimum time. Two bits are assigned to each channel, as

shown in Table 16. These bits are automatically set during startup

in Auto mode. tLIM can be adjusted while a channel is active.

Table 16. TLIM Settings

FIELD

TLIM (min)

00b (Default)

50ms

01b

15ms

10b

10ms

11b

6ms

When a channel ILIM event occurs, power is removed from the

channel and the port's ILIM fault is set.

MOSFET Fault Detection

LTC9101-2B/LTC9102 PSE ports are designed to tolerate signifi-

cant levels of abuse, but in extreme cases it is possible for an

external MOSFET to be damaged. A failed MOSFET may short

source to drain, which will make the port appear to be on when

it should be off; this condition may also cause the sense resistor

to fuse open, turning off the port but causing SENSE to rise to

an abnormally high voltage. A failed MOSFET may also short from

gate to drain, causing GATE to rise to an abnormally high voltage.

OUT, SENSE and GATE are designed to tolerate up to 80V faults

without damage.

If the LTC9101-2B/LTC9102 detects any of these conditions for

more than 3.8ms (typical), it disables all port functionality, reduces

the gate drive pull-down current for the port and reports a MOSFET

Fault detection status. This is typically a permanent fault, but the

host can attempt to recover by resetting the port, setting the port to

shutdown mode, or by resetting the entire chip if a port reset fails

to clear the fault. If the MOSFET is in fact bad, the fault will quickly

return, and the port will disable itself again. The remaining ports of

the LTC9101-2B/LTC9102 are unaffected.

An open or missing MOSFET will not trigger a MOSFET Fault

detection status, but will cause a start fault if the LTC9101-2B/

LTC9102 attempts to turn on the port.

Disconnect

The LTC9101-2B/LTC9102 monitors powered channels to ensure

PDs draw their minimum specified current. The IHOLD-2P threshold

(7mA, typical), monitored as the VHOLD-2P threshold across the 0.1Ω

sense resistor, is used to determine if a PD has been disconnected.

Each port maintains a separate disconnect timer (tDIS). The discon-

nect timer counts up when channel current is below the IHOLD-2P

threshold, indicating that the PD is disconnected. When tDIS ex-

pires, power is removed from the channel and the corresponding

port disconnect fault is set. If the current increases above IHOLD-2P

before tDIS expires, the timer resets. As long as the PD exceeds the

minimum current level before tDIS expires, it will remain powered.

Although not recommended, the DC disconnect feature can be

disabled by clearing the corresponding DC Disconnect Enable

bits. Disabling the DC disconnect feature forces the LTC9101-2B/

LTC9102 out of compliance with IEEE standards. A powered port

remains powered after the PD is removed; the still-powered port

may be subsequently connected to a non-PoE data device, poten-

tially causing damage.

The LTC9101-2B/LTC9102 does not include AC disconnect circui-

try. AC disconnect is not a supported feature of 802.3bt.

Fast Surge Recovery

High reliability systems demand excellent surge recovery. It is

increasingly important for a PSE to minimize power disruption to

the PDs during extreme power transients. Furthermore, PDs that do

not meet minimum bulk capacitance requirements are particularly

vulnerable to power brownouts with traditional PSE solutions. The

LTC9101-2B/LTC9102 provides an improved hot swap responsive-

ness with excellent recovery from surge events.

During a surge event, the LTC9102 GATE pin quickly turns off the

external MOSFET current flow to protect the PSE, the MOSFET,

and downstream circuitry. As the surge dissipates, the LTC9102

quickly turns the MOSFET back on in a safe, current limited manner

while minimizing power disruption to the PD. The LTC9102 fast

MOSFET turn off and power recovery better support both IEEE

compliant PDs and PDs with lower bulk capacitance in high reliabili-

ty applications.

Autoclass

IEEE 802.3bt introduces a new optional feature, Autoclass. Auto-

class enables the PSE to reclaim power budget from single-signa-

ture PDs requesting more power than needed under worst-case

operating conditions. 802.3bt does not specify Autoclass for dual-

signature PDs. The LTC9101-2B/LTC9102 fully supports Autoclass.

Prior versions of the 802.3 PoE standard specify minimum PSE

output power for worst-case IR drop across the Ethernet cable

and minimum PSE output voltage. However, a method for the PSE

to reclaim over-allocated power is not specified. When a shorter

Ethernet cable is used, or when the guaranteed PSE output voltage

is above the specified minimum, the specified minimum PSE output

power substantially over-allocates power to the PD.

An example PoE system is shown in two versions. Figure 44 shows

a 100W four port PSE servicing three 25.5W PDs over 100meter

cables. Such a system requires the PSE to allocate 25.5W per PD

and a further 4.5W for each 100m cable’s IR drop.

The total power allocation is:

3 Ports × (4.5W + 25.5W) = 90W

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