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VINB

VINB

Regulator

8 V

Sawtooth

Generator

Compensation

and

Softstart

Vref

Logic

Clock

750 kHz

Clock /2

Clock /4

0.9V

0.6V

Clockselectforshortcircuit

andsoftstart

ControlLogic

Vref

Currentlimit

SWB

BOOT

FBB

Error Amplifier

Q 3

SWB

Clock

Fixed 3.3V

select

Fixed 3.3V/adj

Vlogic

Vref

Soft-start (Step-Down Converter)

Setting the Output Voltage, Adjustable or Fixed 3.3V (step-down converter)

1 )

R9

R10

(7)

TPS65167

TPS65167A

SLVS760B – APRIL 2007 – REVISED OCTOBER 2007

Figure 23. Block Diagram Buck Converter

To avoid high inrush current during start-up, an internal soft-start is implemented. When the step-down converter

the reference voltage reaches this power good threshold, the error amplifier is released to its normal operation

with its normal duty cycle. To further limit the inrush current during soft-start, the converter frequency is set to

See the internal block diagram. The softstart is typically completed within 1 ms.

The device supports a fixed 3.3-V output voltage when the feedback FBB is connected to GND. When using the

external voltage divider any other output voltage can be programmed.

To set the adjustable output voltage of the step-down converter, use an external voltage divider to set the output

voltage. The output voltage is calculated as:

with R10

≈ 1.2 kΩ and internal reference voltage V(ref)typ = 1.213 V

At load currents < 1 mA, the device operates in discontinuous conduction mode. When the load current is

reduced to zero, the output voltage rises slightly above the nominal output voltage. At zero load current, the

device skips clock cycles but does not completely stops switching thus the output voltage sits slightly above the

nominal output voltage. Therefore, the lower feedback resistor is selected to be around 1.2 k

Ω to have always

around 1 mA minimum load current.

Copyright © 2007, Texas Instruments Incorporated

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Product Folder Link(s): TPS65167 TPS65167A