WM8580 datasheet(46/97 Pages) WOLFSON

46 / 97 page

WM8580

Production Data

PD Rev 4.3 August 2007

PRIMARY AUDIO INTERFACE TRANSMITTER (PAIF TX)

The PAIF Transmitter requires a left-right-clock (LRCLK) and a bit-clock (BCLK). These can be

supplied externally (slave mode) or they can be generated internally by the WM8580 (master mode).

The master mode LRCLK/BCLK are created by the Master Mode Clock Generator module. The

control of this module is described on page 22.

The clock supplied to this module can be ADCMCLK, PLLACLK, PLLBCLK, or MCLK and is selected

by the internal signal paiftxms_clksel’. If the PAIF Transmitter is sourcing the S/PDIF Receiver, it is

recommended that the interface operate in master mode. For this path, paiftxms_clksel selects

PLLACLK. For all other digital routing options, paiftxms_clksel automatically selects whichever clock

the adc_clk is using.

If in slave mode, and adc_clk is set to be MCLK, then the PAIFRX_BCLK is used as the BCLK for

the PAIF Transmitter.

Figure 30 PAIF Transmitter Clock Selection

SECONDARY AUDIO INTERFACES (SAIF RX & SAIF TX)

The Transmit and Receive sides of the Secondary Audio Interface share a common LRCLK and a

common BCLK. These can be supplied externally (slave mode) or they can be generated internally

by the WM8580 (master mode). The master mode LRCLK/BCLK are created by the Master Mode

Clock Gen module. The control of this module is described on page 22.

The clock supplied to this module can be ADCMCLK, PLLACLK, PLLBCLK, or MCLK and is selected

using the SAIFMS_CLKSEL register. If the digital routing has been configured such that the SAIF

Transmitter is sourcing the S/PDIF Receiver, then PLLACLK is automatically selected, and it is

recommended that the interface operate in master mode. However, if the SAIF Transmitter sources

something other than the S/PDIF Receiver, and the S/PDIF Receiver is powered up, the PLLACLK

and PLLBCLK are invalid for SAIF operation, so the choice is limited to MCLK (default) or

ADCMCLK.

WM8580 Datasheet(PDF) 46 Page - Wolfson Microelectronics plc