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WM8580 Datasheet(PDF) 57 Page - Wolfson Microelectronics plc |
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WM8580 Datasheet(HTML) 57 Page - Wolfson Microelectronics plc |
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57 / 97 page ![]() Production Data WM8580 w PD Rev 4.3 August 2007 57 The WM8580 also transmits the preamble and VUCP bits (Validity, User Data, Channel Status and Parity bits). Validity Bit By default, set to 0 (to indicate valid data) with the following exceptions: 1. TXSRC=00 (S/PDIF receiver), where Validity is the value recovered from the S/PDIF input stream by the S/PDIF receiver. 2. TXVAL_OVWR=1, where Validity is the value set in registers TXVAL_SF0 and TXVAL_SF1. User Data Set to 0 as User Data configuration is not supported in the WM8580 – if TXSRC=00 (S/PDIF receiver) User Data is the value recovered from the S/PDIF input stream by the S/PDIF receiver. Channel Status The Channel Status bits form a 192-frame block - transmitted at one bit per sub-frame. Each sub- frame forms its own 192-frame block. The WM8580 is a consumer mode device and only the first 40 bits of the block are used. All data transmitted from the WM8580 is stereo, so the channel status data is duplicated for both channels. The only exception to this is the channel number bits (23:20) which can be changed to indicate whether the channel is left or right in the stereo image. Bits within this block can be configured by setting the Channel Status Bit Control registers (see Table 50 to Table 54). If TXSRC=00 (S/PDIF receiver), the Channel Status bits are transmitted with the same values recovered by the receiver – unless OVWCHAN is set, in which case they are set by the S/PDIF transmitter channel status registers. Parity Bit This bit maintains even parity for data as a means of basic error detection. It is generated by the transmitter. For further details of all channel status bits, refer to IEC-60958-3. REGISTER ADDRESS BIT LABEL CHANNEL STATUS BIT DEFAULT DESCRIPTION 0 CON/PRO 0 0 0 = Consumer Mode 1 = Professional Mode (not supported by WM8580) 1 AUDIO_N 1 0 Linear PCM Identification 0 = S/PDIF transmitted data is audio PCM. 1 = S/PDIF transmitted data is not audio PCM. 2 CPY_N 2 0 0 = Transmitted data has copyright asserted. 1 = Transmitted data has no copyright assertion. 5:3 DEEMPH[2:0] 5:3 000 000 = Data from Audio interface has no pre- emphasis. 001 = Data from Audio interface has pre- emphasis. 010 = Reserved (Audio interface has pre- emphasis). 011 = Reserved (Audio interface has pre- emphasis). All other modes are reserved and should not be used. R31 SPDTXCHAN 1 1Fh 7:6 CHSTMODE [1:0] 7:6 00 00 = Only valid mode for consumer applications. Table 50 S/PDIF Transmitter Channel Status Bit Control 1 |
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