SM5951A

SEIKO NPC CORPORATION —7

AC Characteristics

When fs

= 44.1kHz, the FS and BCKI clock inputs have the following frequency division relationship to the

master clock input on CLK.

I

When CLK

= 1024fs:

(FS) cycle

= 1024 × CLK cycles

(BCKI) cycle [128fs mode]

= 8 × CLK cycles (128fs)

(BCKI) cycle [64fs mode]

= 16 × CLK cycles (64fs)

I

When CLK

= 1280fs:

(FS) cycle

= 1280 × CLK cycles

(BCKI) cycle [128fs mode]

= 10 × CLK cycles (128fs)

(BCKI) cycle [64fs mode]

= 20 × CLK cycles (64fs)

System clock input

I

CLK pin

1FS clock input

I

FS pin (44.1kHz)

Parameter

Symbol

Rating

Unit

min

typ

max

HIGH-level pulsewidth

7

11.07 (1024fs)

8.86 (1280fs)

−

ns

LOW-level pulsewidth

7

11.07 (1024fs)

8.86 (1280fs)

−

ns

Pulse cycle

16

22.14 (1024fs)

17.72 (1280fs)

−

ns

Rise/Fall time

−−

2ns

Parameter

Symbol

Rating

Unit

min

typ

max

HIGH-level pulsewidth

−

11.34

−µs

LOW-level pulsewidth

−

11.34

−µs

Pulse cycle

−

22.68

−µs

Rise/Fall time

−−

10

ns

CLK

FS