All trademarks mentioned in this document

are trademarks of their respective owners.

Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.

http://www.DigitalCoreDesign.com

http://www.dcd.pl

fre-

quency

(VAX MIPS)

80C51

-

12 MHz

268 (0.153)

80C310

-

33 MHz

1550 (0.882)

DP8051XP

STRATIX-II

150 MHz

31386 (17.85)

Core performance in terms of Dhrystones

268

1550

31386

0

3000

6000

9000

12000

15000

18000

21000

24000

27000

30000

33000

80C51 (12MHz)

80C310 (33MHz)

DP8051XP (150MHz)

Area utilized by the each unit of DP8051XP

core in vendor specific technologies is summa-

rized in table below.

Area

Component

[LC]

[FFs]

CPU*

1620

285

DPTR1 register

50

32

DPTR0 decrement

40

0

DPTR1 decrement

40

0

DPTR0 & DPTR1 auto-switch

30

8

Timed Access protection

20

10

Interrupt Controller

150

40

INT2-INT6

100

25

Power Management Unit

10

5

I/O ports

100

35

Timers

160

50

Timer 2

170

60

UART0

210

60

UART1

210

60

Master I2C Unit

260

120

Slave I2C Unit

160

70

SPI Unit

110

55

Compare Capture Unit

150

60

Watchdog Timer

100

45

Multiply Divide Unit

500

105

Total area

4190

1120

*CPU – consisted of ALU, Opcode Decoder, Control Unit, Program &

Internal & External Memory Interfaces, User SFRs Interface

Core components area utilization in all technologies except

STRATIX-II

Area

Component

[LC]

[FFs]

CPU*

1265

285

DPTR1 register

40

32

DPTR0 decrement

30

0

DPTR1 decrement

30

0

DPTR0 & DPTR1 auto-switch

25

8

Timed Access protection

15

10

Interrupt Controller

120

40

INT2-INT6

75

25

Power Management Unit

10

5

I/O ports

75

35

Timers

125

50

Timer 2

135

60

UART0

165

60

UART1

165

60

Master I2C Unit

220

120

Slave I2C Unit

125

70

SPI Unit

85

55

Compare Capture Unit

120

60

Watchdog Timer

75

45

Multiply Divide Unit

800

105

Total area

3700

1120

*CPU – consisted of ALU, Opcode Decoder, Control Unit, Program &

Internal & External Memory Interfaces, User SFRs Interface

Core components area utilization in STRATIX-II