Data Sheet

LTC9105

ELECTRICAL CHARACTERISTICS

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Rev. A | 5 of 22

The * denotes the specifications that apply over the full operating temperature range. Otherwise, specifications are at TA = 25°C. VIN

– RTN = 55V, unless otherwise noted.

Table 4. Electrical Characteristics

SYMBOL

PARAMETER

CONDITIONS

MIN TYP

MAX UNITS

VIN Operating Input Voltage

VIN-RTN

*

60

V

IOFFSET

Input Offset Current

VIN-RTN in range of VSIG

*

10

μA

VSIG

VIN Signature Range

VIN-RTN

* 1.5

10

V

VCLASS

VIN Classification Range

VIN-RTN

* 12.5

21

V

VMARK

VIN Mark Range

VIN-RTN

* 5.6

10

V

Class/Mark Hysteresis

VIN-RTN

1.2

V

VON

VIN Gate Turn On

VIN-RTN

* 33

37

V

VOFF

VIN Gate Turn Off

VIN-RTN

* 30

V

Hot Swap On/Off Hysteresis

VIN-RTN

3.3

V

VRESET

Reset Threshold

VIN-RTN, Preceded by VCLASS

* 2.6

5.6

V

VBYP

Bypass Pin Voltage

VIN > VON

4.3

V

Supply Current

Supply Current

VIN > VON

*

2.2

3.0

mA

Supply Current During Classification

VIN = 17.5V, RCLSA and RCLSB open

* 330

600

μA

Supply Current During Mark Event

VIN = VMARK After 1st Classification Event

* 0.85

1.6

mA

Detection and Classification Signature

RSIG Pin Resistance

VIN = VSIG, IRSIG= 1mA

*

270

Ω

Resistance During Mark Event

RVIN-RTN, VIN = VMARK After 1st Classification Event

*

8

12

kΩ

RCLSA, RCLSB Operating Voltage

−1mA ≥ IRCLSA, IRCLSB ≤ −44mA, VIN = VCLASS

* 0.95

3

0.983 1.013 V

Classification Signature Stability Time

* 0.25

2

ms

Gate Driver

Active Current Limit During Inrush

SNSP-SNSN, VIN > VON, tON < tPWRGD

5

mV

GATE Pin On Voltage

GATE-RTN, IGATE = 1μA

* 11

12

14

V

GATE Pin Pull Down Current

VIN < VOFF, GATE-RTN = 1V

*

0.5

mA

Auxiliary Supply Input Sense

VAUX_TH

Auxiliary Pin Threshold

AUX-RTN, VIN > VON, aux_thresh = 0

* 1.0

1.05

1.1

V

Digital Input/Output

VIH

Digital Input High Voltage

AD0, M1, M0

* 2.5

V

SCL, SDAIN

* 2.2

V

VIL

Digital Input Low Voltage

AD0, M1, M0

*

1.9

V

SCL, SDAIN

*

1.7

V

SDAOUT Pin Output Low Voltage

ISDAOUT = 3mA

*

0.4

V

ISDAOUT = 5mA

*

0.7

V

Internal Pull-Down to RTN

AD0, M1, M0

50

kΩ

Internal Pull-Up to BYP

SCL, SDAIN

50

kΩ

Power Good

tPWRGD

PWRGD Delay Timer

From VON Threshold to PWRGD HI-Z (Note 1)

93.75

ms

IPWRGD

PWRGD Current During tPWRGD

PWRGD = 1V, VIN > VON, tON < tPWRGD

* 195

250

305

μA

Maintain Power Signature

DC Integration Time

100

ms

MPS Pulse Time

100

ms

MPS Backoff time

200

ms

DC MPS Threshold

SNSP-SNSN (Note 1)

* 900

1000

μV