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LTM8065 Datasheet(PDF) 10 Page - Analog Devices

Part # LTM8065
Description  Quad 40VIN, 3A Silent Switcher μModule Regulator with Package-Level EMI Shield
PDF  43 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM8065 Datasheet(HTML) 10 Page - Analog Devices

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Data Sheet
LTM8060F
analog.com
Rev. 0
10 of 43
PIN
NAME
DESCRIPTION
CFG 1
Bank
4
VIN2
Input Power for the Channel 2 Regulator. Decouple VIN2 to ground with an external
low Equivalent series resistance (ESR) capacitor. See Table 6 for recommended
values.
Bank
5
VIN34
Input Power for the Channel 3 and Channel 4 Regulator. The VIN34 bank powers the
internal control circuitry for both Channel 3 and Channel 4 and is monitored by
undervoltage lockout circuitry. The VIN34 voltage must be greater than 3V for either
Channel 3 or Channel 4 of the LTM8060F to operate. Decouple VIN34 to ground with
an external low-ESR capacitor. See Table 6 for recommended values.
Bank
6
VIN1
Input Power for the Channel 1 Regulator. The VIN1 powers the internal control
circuitry for Channel 1 and Channel 2 and is monitored by undervoltage lockout
circuitry. The VIN1 voltage must be greater than 3V for either Channel 1 or Channel 2
of the LTM8060F to operate. Decouple VIN1 to ground with an external low-ESR
capacitor. See Table 6 for recommended values.
Banks
8, 3, 1,
7
VOUT1−OUT4
Power Output for Channel 1, through Channel 4, respectively. Apply the output filter
capacitor and the output load between these pins and the GND plane.
C10,
N2
CLKOUT12, 34
Synchronization Output. When SYNC12, 34 > 2.8V, the CLKOUT12, 34 pins provide a
waveform about 90° out-of-phase with Channel 1 and Channel 3, respectively. This
allows synchronization with other regulators with up to four phases. When an
external clock is applied to the SYNC12, 34 pins, the CLKOUT12, 34 pins will output a
waveform with about the same phase, duty cycle, and frequency as the SYNC12, 34
waveform. In Burst Mode® operation, the CLKOUT12, 34 pins will be internally
grounded. Float these pins if the CLKOUT12, 34 function is not used. Do not drive
these pins.
C11,
N1
SYNC12, 34
External Clock Synchronization Input. Ground these pins for low ripple Burst Mode
operation at low output loads; this will also disable the CLKOUT function. Apply a
DC voltage between 2.8V and 4V for forced continuous mode (FCM) operation with
spread spectrum modulation. Float the SYNCn pin for FCM operation without spread
spectrum modulation. Apply a clock source to the SYNCn pin for synchronization to
an external frequency. The LTM8060F will be in FCM when an external frequency is
applied.
E9,
D10,
L3, M2
PG1−PG4
The PGn pins are the open-drain output of an internal comparator. The PGn pin
remains low until the FBn pin is within ±7.5% of the final regulation voltage, and
until there are no fault conditions. The PGn pin is pulled low during VINn UVLO,
thermal shutdown, or when the RUNn pins are low.
E10,
L2
DNC
Do not connect these pins.
E11,
D11,
L1, M1
RUN1−RUN4
The corresponding channel of the LTM8060F is shut down when these pins are low
and active when these pins are high. Connect to VINn if the shutdown feature is not
used. An external resistor divider from VINn can be used to program a VINn threshold
below which the corresponding channel of the LTM8060F will shut down. Do not
float these pins.



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