 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ADS1282IPWR Datasheet(PDF) 3 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
ADS1282IPWR Datasheet(HTML) 3 Page - Texas Instruments |
|
|
3 / 42 page  www.ti.com ELECTRICAL CHARACTERISTICS ADS1282 SBAS418A – SEPTEMBER 2007 – REVISED DECEMBER 2007 Limit specifications at –40 °C to +85°C. Typical specifications at +25°C, AVDD = +2.5V, AVSS = –2.5V, f CLK (1) = 4.096MHz, VREFP = +2.5V, VREFN = –2.5V, DVDD = +3.3V, Chopping on, PGA = 1, High-Resolution Mode, and fDATA = 1000SPS, unless otherwise noted. ADS1282 PARAMETER CONDITIONS MIN TYP MAX UNIT ANALOG INPUTS Full-scale input voltage VIN = (AINP – AINN) ±VREF/2 × PGA V Absolute input range (AINP or AINN) AVSS + 0.7 AVDD – 1.25 V Chopping off 1000 Differential input impedance Chopping on 100 M Ω Chopping off 100 Common-mode input impedance Chopping on 1 Chopping off 0.1 Input bias current nA Chopping on 1 Crosstalk –125 dB MUX on-resistance 30 Ω PGA OUTPUT (CAPP, CAPN) PGA differential output impedance 600 Ω Output impedance tolerance ±10 % External bypass capacitance 10 nF Modulator differential input impedance 55 k Ω AC PERFORMANCE High-resolution mode TBD 124 Signal-to-noise ratio(2) (SNR) dB Low-power mode TBD 121 VIN = 31.25Hz, –0.5dBFS, PGA = 8 Total harmonic distortion (THD) High-resolution mode –120 TBD dB Low-power mode –117 TBD Spurious-free dynamic dB (SFDR) –122 range DC PERFORMANCE Resolution No missing codes 31 Bits FIR filter mode 250 4000 SPS Data rate (fDATA) Sinc filter mode 8000 128,000 SPS Integral nonlinearity (INL)(3) Differential input 0.00008 TBD % FSR(4) Offset error 100 TBD µV Offset error after calibration(5) Shorted input 1 µV Offset drift 0.2 µV/°C Gain error(6) TBD –1 TBD % Gain error after calibration(5) 0.0002 % Gain drift 1 ppm/ °C Gain matching 0.5 TBD % Common-mode rejection fCM = 60Hz (7) TBD 110 dB AVDD, AVSS TBD 95 Power-supply rejection fPS = 60Hz (7) dB DVDD TBD 105 (1) fCLK = system clock. (2) VIN = 20mVDC/Gain, see Table 1. (3) Best-fit method. (4) FSR: Full-scale range = ±VREF/2 × PGA. (5) Calibration accuracy is on the level of noise reduced by 4 (calibration averages 16 readings). (6) The PGA output impedance and the modulator input impedance results in –1% systematic gain error. (7) fCM is the input common-mode frequency. fPS is the power-supply frequency. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): ADS1282 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
