UG-826

EK1HMC7044LP10B User Guide

Rev. 0 | Page 8 of 10

OUTPUT CHANNEL CONTROLS

The channel divider controls shown in Figure 19 are accessed

via the OUTPUTS tab. It is usually sufficient to change only the

divide ratio, because the evaluation software and the HMC7044

output duty cycle remains at 50%.

The phase offset can be varied by three different methods, as

shown in Figure 20. Two of them are based on digital delay. One

is slip-based delay, which provides unlimited one full VCO

cycle delay. To perform slip, channel multislip mask be checked,

as shown in Figure 20. Enter the number of VCO cycle value,

and click Slip.

Figure 19. Output Clock Driver Tab of HMC7044 Evaluation Software GUI

Figure 20. Example Output Channel—Configurable Blocks