ACT8865 datasheet(22/32 Pages) QORVO

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ACT8865

Advanced PMU for Atmel SAMA5Dx Series & SAM9 Series Processors

Data Sheet Rev. H, September 2019 | Subject to change without notice

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SYSTEM CONTROL INFORMATION CONT’D

Control Signals

Enable Inputs

The ACT8865 features a variety of control inputs,

which

are

used

enable

and

disable

outputs

depending

upon

the

desired

mode

operation.

PWREN, PWRHLD are logic inputs, while nPBIN is a

unique, multi-function input. Refer to the Processor

Specification for a description of which channels are

controlled by each input.

nPBIN Multi-Function Input

ACT8865 features the nPBIN multi-function pin, which

combines

system

enable/disable

control

with

hardware reset function. Select either of the two pin

functions by asserting this pin, either through a direct

connection to GA, or through a 50kΩ resistor to GA, as

shown in Figure 2.

Figure 2: nPBIN

Input

Manual Reset

The second major function of the nPBIN input is to

provide a manual-reset input for the processor. To

manually-reset the processor, drive nPBIN directly to

GA through a low impedance (less than 2.5kΩ). When

this occurs, nRSTO immediately asserts low, then

remains asserted low until the nPBIN input is de-

asserted and the reset time-out period expires.

nPBSTAT Output

nPBSTAT is an open-drain output that reflects the

state of the nPBIN input; nPBSTAT is asserted low

whenever nPBIN is asserted, and is high-Z otherwise.

This output is typically used as an interrupt signal to

the processor, to initiate a software-programmable

routine such as operating mode selection or to open

a menu. Connect nPBSTAT to an appropriate supply

voltage (typically OUT3) through a 10kΩ or greater

resistor.

nRSTO Output

nRSTO is an open-drain output which asserts low

upon startup or when manual reset is asserted via the

nPBIN input. When asserted on startup, nRSTO remains

low until reset time-out period expires after OUT3

reaches its power-OK threshold. When asserted due to

manual-reset, nRSTO immediately asserts low, then

remains asserted low until the nPBIN input is de-

asserted and the reset time-out period expires.

Connect a 10kΩ or greater pull-up resistor from nRSTO

to an appropriate voltage supply (typically OUT3).

nIRQ Output

nIRQ is an open-drain output that asserts low any time

an interrupt is generated. Connect a 10kΩ or greater

pull-up resistor from nIRQ to an appropriate voltage

supply. nIRQ is typically used to drive the interrupt

input of the system processor.

Many of the ACT8865's functions support interrupt-

generation as a result of various conditions. These are

typically masked by default, but may be unmasked

via

the

interface.

For

more information

about

the

available fault

conditions, refer to the

appropriate sections of this datasheet.

Note that under some conditions a false interrupt may

be generated upon initial startup. For this reason, it is

recommended that the interrupt service routine check

and validate nSYSLEVMSK[ ] and nFLTMSK[ ] bits

before processing an interrupt generated by these

bits. These interrupts may be validated by nSYSSTAT

[ ], OK[ ] bits.

Push-Button Control

The ACT8865 is designed to initiate a system enable

sequence when the nPBIN multi-function input is

asserted. Once this occurs, a power-on sequence

commences,

described

below.

The

power-on

sequence must complete and the microprocessor must

take control (by asserting PWREN or PWRHLD) before

nPBIN is de-asserted. If the microprocessor is unable

to complete its power-up routine successfully before the

user

releases

the

push-button,

the

ACT8865

automatically shuts the system down. This provides

protection against accidental or momentary assertions

of the push-button. If desired, longer “push-and-hold”

times

can be

implemented by simply adding an

additional time

delay

before asserting PWREN or

PWRHLD.

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