AX88190AL datasheet(18/49 Pages) ASIX

18 / 49 page

AX88190A

PCMCIA Fast Ethernet MAC Controller

ASIX ELECTRONICS CORPORATION

4.2.2 Configuration and Status Register of MODEM (MCSR) Offset 3E2H (Read/Write)

FIELD

R/W/C

DESCRIPTION

7:3

Reserved

R/W

MPwrDwn : Modem power down setting

While this bit set to 1, MPWDN pin (pin 116) will be active to force modem chip into power

down mode. As for MPWDN is active high or active low. Please refer section 2.7 Power on

configuration setup signal cross reference table.

Intr : Interrupt Request

The LAN function will set this bit to 1 when it need interrupt service and set it to 0 when it

is not request interrupt service.

IntrAck : Interrupt Acknowledge

This bit will be 0. The Intr will reflect the status of interrupt requesting.

4.2.3 I/O Base Register 0/1 of MODEM (MIOBASE0/1) Offset 3EAH/3ECH (Read/Write)

The I/O Base registers (MIOBASE0 and MIOBASE1) determine the base address of the I/O range used to

access the MODEM specific registers.

I/O Base Register 0

FIELD

R/W/C

DESCRIPTION

7:0

R/W

Base I/O address bit 7 – 0.

I/O Base Register 1

FIELD

R/W/C

DESCRIPTION

7:0

R/W

Base I/O address bit 15 – 8.

AX88190AL Datasheet(PDF) 18 Page - ASIX Electronics Corporation