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EPM240 Datasheet(PDF) 60 Page - Altera Corporation |
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EPM240 Datasheet(HTML) 60 Page - Altera Corporation |
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60 / 88 page ![]() 5–2 Chapter 5: DC and Switching Characteristics Operating Conditions MAX II Device Handbook © August 2009 Altera Corporation Recommended Operating Conditions Table 5–2 shows the MAX II device family recommended operating conditions. Table 5–2. MAX II Device Recommended Operating Conditions Symbol Parameter Conditions Minimum Maximum Unit V CCINT (1) 3.3-V supply voltage for internal logic and ISP MAX II devices 3.00 3.60 V 2.5-V supply voltage for internal logic and ISP MAX II devices 2.375 2.625 V 1.8-V supply voltage for internal logic and ISP MAX IIG and MAX IIZ devices 1.71 1.89 V V CCIO (1) Supply voltage for I/O buffers, 3.3-V operation —3.00 3.60 V Supply voltage for I/O buffers, 2.5-V operation — 2.375 2.625 V Supply voltage for I/O buffers, 1.8-V operation —1.71 1.89 V Supply voltage for I/O buffers, 1.5-V operation — 1.425 1.575 V V I Input voltage (2), (3), (4) –0.5 4.0 V V O Output voltage — 0 V CCIO V T J Operating junction temperature Commercial range 0 85 °C Industrial range –40 100 °C Extended range (5) –40 125 °C Notes to Table 5–2: (1) MAX II device in-system programming and/or user flash memory (UFM) programming via JTAG or logic array is not guaranteed outside the recommended operating conditions (for example, if brown-out occurs in the system during a potential write/program sequence to the UFM, users are recommended to read back UFM contents and verify against the intended write data). (2) Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents less than 100 mA and periods shorter than 20 ns. (3) During transitions, the inputs may overshoot to the voltages shown in the following table based upon input duty cycle. The DC case is equivalent to 100% duty cycle. For more information about 5.0-V tolerance, refer to the Using MAX II Devices in Multi-Voltage Systems chapter in the MAX II Device Handbook. VIN Max. Duty Cycle 4.0 V 100% (DC) 4.1 90% 4.2 50% 4.3 30% 4.4 17% 4.5 10% (4) All pins, including clock, I/O, and JTAG pins, may be driven before VCCINT and VCCIO are powered. (5) For the extended temperature range of 100 to 125º C, MAX II UFM programming (erase/write) is only supported via the JTAG interface. UFM programming via the logic array interface is not guaranteed in this range. |
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