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EPM240 Datasheet(PDF) 77 Page - Altera Corporation |
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EPM240 Datasheet(HTML) 77 Page - Altera Corporation |
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77 / 88 page  Chapter 5: DC and Switching Characteristics 5–19 Timing Model and Specifications © August 2009 Altera Corporation MAX II Device Handbook Table 5–24 shows the external I/O timing parameters for EPM570 devices. f CNT Maximum global clock frequency for 16-bit counter — — 304.0 (1) — 247.5 — 201.1 — 184.1 — 123.5 — 118.3 MHz Note to Table 5–23: (1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock input pin maximum frequency. Table 5–23. EPM240 Global Clock External I/O Timing Parameters (Part 2 of 2) Symbol Parameter Condition MAX II / MAX IIG MAX IIZ Unit –3 Speed Grade –4 Speed Grade –5 Speed Grade –6 Speed Grade –7 Speed Grade –8 Speed Grade Min Max Min Max Min Max Min Max Min Max Min Max Table 5–24. EPM570 Global Clock External I/O Timing Parameters (Part 1 of 2) Symbol Parameter Condition MAX II / MAX IIG MAX IIZ Unit –3 Speed Grade –4 Speed Grade –5 Speed Grade –6 Speed Grade –7 Speed Grade –8 Speed Grade Min Max Min Max Min Max Min Max Min Max Min Max t PD1 Worst case pin- to-pin delay through 1 look- up table (LUT) 10 pF — 5.4 — 7.0 — 8.7 — 9.5 — 15.1 — 17.7 ns t PD2 Best case pin- to-pin delay through 1 LUT 10 pF — 3.7 — 4.8 — 5.9 — 5.7 — 7.7 — 8.5 ns t SU Global clock setup time — 1.2 — 1.5 — 1.9 — 2.2 — 3.9 — 4.4 — ns t H Global clock hold time — 0 —0 — 0 — 0 —0 —0 — ns t CO Global clock to output delay 10 pF 2.0 4.5 2.0 5.8 2.0 7.1 2.0 6.7 2.0 8.2 2.0 8.7 ns t CH Global clock high time — 166 — 216 — 266 — 253 — 335 — 339 — ps t CL Global clock low time — 166 — 216 — 266 — 253 — 335 — 339 — ps t CNT Minimum global clock period for 16-bit counter — 3.3 —4.0 — 5.0 —5.4 —8.1 —8.4 — ns |
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