VCS

20V/Div

ILED

200 mA/Div

DIM

2V/Div

2 Ps/ DIV

LM3401

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SNVS516C – AUGUST 2007 – REVISED MAY 2013

When current limit is activated, the HG driver remains off until the CS voltage rises to -130 mV (typical). This

ensures that inductor current is close to 0A when the current limit latch is released. The actual minimum inductor

current will depend on the catch diode forward voltage characteristic, which determines the CS pin negative

voltage.

Although the LM3401 monitors voltage at the CS pin to reset the current limit, there is also a minimum off time of

typically 3 µs. When current limit is triggered, HG will be turned off for at least this amount of time, regardless of

the inductor current.

The current limit comparator imposes typically 150 ns of blanking time at the beginning of each switching cycle.

This ensures that the PFET is fully on and any switch node ringing has dissipated when the current is sensed.

However a slower PFET may not fully turn on within the blanking time. In this case, the current limit threshold

must be increased or a faster PFET must be used.

Because the current limit comparator has a limited differential voltage capability, a maximum of 1M

Ω is

recommended for R3.

PWM DIMMING

The DIM pin is a CMOS compatible input for a PWM (Pulse Width Modulation) dimming signal. PWM dimming

adjusts LED brightness by varying the duty cycle, which varies the average LED current. This type of dimming is

recommended, because LED peak current remains constant regardless of brightness, which results in more

predictable LED color and performance as compared to analog dimming. Figure 20 shows a typical PWM

dimming waveform.

When DIM is high (above 2V typically) the LM3401 operates normally and the LED string will be driven at the set

current. When pulled low, DIM will disable HG and switching will stop. The PFET will remain off as long as DIM is

low. When the LM3401 is powered up or enabled with the DIM pin, the LED current will very rapidly increase to

its set point.

There is minimal delay time between a DIM logic change and HG switching. Also, because the LM3401 requires

no output capacitor, minimal time is required to ramp-up the LED current. This allows for low duty cycle, high

frequency PWM dimming signals to be used.

A dimming frequency greater than 100 Hz is recommended to avoid visible flicker. The LM3401 is capable of

PWM dimming frequencies up to 10 kHz with a duty cycle between 1 and 100%. Any DIM signal pulse width

longer than 100 ns can be used. In most cases, the maximum dimming frequency is limited by the inductor size

and input voltage to anode voltage ratio. Less inductance and higher VIN/VANODE ratios will allow the inductor and

LED current to increase faster, thus allowing for a faster PWM frequency, or lower dimming duty cycle.

Figure 20. Typical PWM DIM Signal and LED Current L = 22 µH

DIM is a high impedance pin, which is somewhat sensitive to noise. If there is excessive switching noise at the

DIM pin, a small bypass filter capacitor can be used. See the Ripple Reduction Capacitor section. VIN can also

be used for PWM dimming when a logic signal is not available. In this mode of operation DIM should be

connected to VIN through a 10 kΩ resistor. There is typically 10 us of startup delay time when using VIN for

dimming. Depending on the application, this delay limits the maximum dimming frequency to typically several

hundred Hz.

Higher dimming frequency and lower dimming duty cycle can be achieved by using a FET switch in parallel with

the LED string. This is shown in Figure 21 below.

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