LM8330 datasheet(40/54 Pages) TI2

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LM8330

SNVS839A – JUNE 2012 – REVISED MARCH 2013

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Table 75. GPIOIE0 - GPIO Interrupt Enable Register 0 (continued)

Address

Type

Interrupt enable on KPX[7:0]:

KPX[7:0]IE

7:0

0x0

0: disable interrupt

1: enable interrupt

GPIOIE1 - GPIO Interrupt Enable Register 1

Table 76. GPIOIE1 - GPIO Interrupt Enable Register 1

Address

Type

GPIOIE1

0xD3

R/W

Enable/disable interrupts on KPY[7:0].

Bit - Name

Bit

Default

Bit Function

Interrupt enable on KPY[7:0]:

KPY[7:0]IE

7:0

0x0

0: disable interrupt

1: enable interrupt

GPIOIE2 - GPIO Interrupt Enable Register 2

Table 77. GPIOIE2 - GPIO Interrupt Enable Register 2

Address

Type

GPIOIE2

0xD4

R/W

Enable/disable interrupts on KPY[11:8].

Bit - Name

Bit

Default

Bit Function

(reserved)

7:4

(reserved)

Interrupt enable on KPY[11:8]:

KPY[11:8]IE

3:0

0x0

0: disable interrupt

1: enable interrupt

GPIOIC0 - GPIO Clear Interrupt Register 0

Table 78. GPIOIC0 - GPIO Clear Interrupt Register 0

Address

Type

GPIOIC0

0xDC

Clears the interrupt on KPX[7:0].

Bit - Name

Bit

Default

Bit Function

Clear Interrupt on KPX[7:0]:

KPX[7:0]IC

7:0

0: no effect

1: Clear corresponding interrupt

GPIOIC1 - GPIO Clear Interrupt Register 1

Table 79. GPIOIC1 - GPIO Clear Interrupt Register 1

Address

Type

GPIOIC1

0xDD

Clears the interrupt on KPY[7:0].

Bit - Name

Bit

Default

Bit Function

Clear Interrupt on KPY[7:0]:

KPY[7:0]IC

7:0

0: no effect

1: Clear corresponding interrupt

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