SS

(host)

SCK

(host)

16xN clocks

Device N-1

Write Data

Device N-2

Write Data

Device N-3

Write Data

Device N

Write Data

MOSI (host)

MOSI Device 1

MISO Device 1

MOSI Device 2

'21¶7 &$5(

Device 1

Write Data

Device N

Write Data

Device N-1

Write Data

Device N-2

Write Data

Device 2

Write Data

'21¶7 &$5(

'21¶7 &$5(

'21¶7 &$5(

'21¶7 &$5(

Device N

Write Data

MISO Device N-1

MOSI Device N

SPI Write Data

A6 A5 A4 A3 A2 A1

0

A0 D7 D6 D5 D4

D2 D1 D0

D3

Host

MISO

MOSI

SCK

SS

LMH0366

MOSI

MISO

LMH0366

MOSI

MISO

LMH0366

MOSI

MISO

LMH0366

MOSI

MISO

Device 1

Device 2

Device 3

Device N

LMH0366

www.ti.com

SNAS585D – APRIL 2012 – REVISED APRIL 2013

Figure 6. SPI Daisy Chain System Architecture

In a daisy-chain configuration of N LMH0366 devices, the host conceptually sees a shift register of length 16xN.

Therefore the length of SPI transactions (as previously described) is 16xN bits, and SS must be asserted for

16xN clock cycles for each SPI transaction.

SPI Daisy-Chain Write

Figure 7 shows the SPI daisy-chain write for a daisy-chain of N devices. The SS signal is driven low and SCK is

toggled for 16xN clocks. The 16xN bit MOSI payload (sent to Device 1 in the daisy-chain) consists of the 16-bit

SPI write data for Device N (the last device in the chain), followed by the write data for Device N-1, Device N-2,

etc., ending with the write data for Device 1 (the first device in the chain). The 16-bit SPI write data for each

device consists of a “0” (write command), seven address bits, and eight data bits. After the SPI daisy-chain write,

SS must return high and then the write occurs for all devices in the daisy-chain.

Figure 7. SPI Daisy-Chain Write

SPI Daisy-Chain Read

Figure 8 shows the SPI daisy-chain read for a daisy-chain of N devices. The SPI daisy-chain read is 32xN bits

long, consisting of 16xN bits for the read transaction followed by 16xN bits for the dummy read transaction (all

“1”s) to shift out the read data on the MISO output. The SS signal is driven low and SCK is toggled for 16xN

clocks. The first 16xN bit MOSI payload (sent to Device 1 in the daisy-chain) consists of the 16-bit SPI read data

for Device N (the last device in the chain), followed by the read data for Device N-1, Device N-2, etc., ending with

the read data for Device 1 (the first device in the chain). The 16-bit SPI read data for each device consists of a

“1” (read command), seven address bits, and eight “1”s (which are ignored). After the first 16xN bit transaction,

SS must return high (to latch the data) and then is driven low again before the second 16xN bit transaction of all

“1”s is sent to the MOSI input. The requested read data is shifted out on MISO starting with the data for Device N

and ending with the data for Device 1. After this transaction, SS must return high.

Copyright © 2012–2013, Texas Instruments Incorporated

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