LMH0366 datasheet(27/41 Pages) TI2

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LMH0366

www.ti.com

SNAS585D – APRIL 2012 – REVISED APRIL 2013

Table 8. SPI Registers (continued)

Addr

Name

Bits

Field

R/W

Default

Description

(hex)

(binary)

Input Signal Detect

SIG_DET_PRESET

R/W

Signal detect preset.

Control

SIG_DET_RESET

R/W

Signal detect reset.

5:3

SIG_DET_LVL

R/W

011

Differential input signal detect

level (VSDID).

011: Assert = 112 mV, de-assert

= 78 mV.

100: Assert = 142 mV, de-assert

= 112 mV.

101: Assert = 180 mV, de-assert

= 142 mV.

110: Assert = 218 mV, de-assert

= 180 mV.

111: Assert = 256 mV, de-assert

= 218 mV.

All others: Reserved.

2:0

RSVD

R/W

000

Reserved.

Reserved

7:0

RSVD

R/W

00000101

Reserved.

EOM Control 1

EOM_OV

R/W

Eye opening monitor PDAC and

VDAC override.

0: EOM phase and voltage DACs

are controlled automatically (in

fast EOM mode and during

HEO/VEO measurement).

1: EOM phase DAC and voltage

DAC values are overridden with

the values in register 0x22 bits

5:0 (EOM_PDAC) and register

0x23 bits 5:0 (EOM_VDAC),

respectively.

EOM_SEL_3G

R/W

3G eye monitor mode. Adds

filtering to improve EOM

performance at 3G data rates.

0: Operate eye monitor in HD or

SD mode.

1: Operate eye monitor in 3G

mode.

5:0

EOM_PDAC

R/W

000000

Eye opening monitor phase DAC

value. When register 0x22 bit 7

(EOM_OV) is set, this field

controls the EOM phase DAC.

EOM Control 2

7:6

RSVD

R/W

Reserved.

5:0

EOM_VDAC

R/W

000000

Eye opening monitor voltage

DAC value. When register 0x22

bit 7 (EOM_OV) is set, this field

controls the EOM voltage DAC.

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