OPA688M

UNITY GAINSTABLE WIDEBAND

VOLTAGE LIMITING AMPLIFIER

SGLS144B − APRIL 2003 − DECEMBER 2006

4

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics, VCC = ±5 V, VICM = 0 V, RL = 500 Ω, limiter pins open (unless otherwise

noted) (see Note 1) (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output

Output voltage range (VOH, VOL)

VH = 4.3 V, VL = −4.3 V,

RL w 500 Ω

TA = 25°C

±3.9

±4.1

V

Output voltage range (VOH, VOL)

VH = 4.3 V, VL = −4.3 V,

RL w 500 Ω

TA = Full range

±3.7

V

Current output, sourcing (IOH)

VH = 4.3 V, VL = −4.3 V,

RL = 20 Ω

TA = 25°C

90

105

mA

Current output, sourcing (IOH)

VH = 4.3 V, VL = −4.3 V,

RL = 20 Ω

TA = Full range

80

mA

Current output, sinking (IOL)

VH = 4.3 V, VL = −4.3 V,

RL = 20 Ω

TA = 25°C

−70

−85

mA

Current output, sinking (IOL)

VH = 4.3 V, VL = −4.3 V,

RL = 20 Ω

TA = Full range

−60

mA

Closed-loop output impedance

G = +1, RF = 25 Ω, f < 100 kHz

0.2

Ω

Power Supply

Operating voltage (VCC)

±5

±6

V

Quiescent current (ICC)

TA = 25°C

14

15.8

17

mA

Quiescent current (ICC)

TA = Full range

11

20

mA

Power supply rejection ratio (PSRR)

Input referred,

VS =

±4.5 V to ±5.5 V

TA = 25°C

58

70

dB

Power supply rejection ratio (PSRR)

Input referred,

VS =

±4.5 V to ±5.5 V

TA = Full range

55

dB

Output Voltage Limiters (pins 5 and 8)

Default output limited voltage

Limiter pins open

TA = 25°C

±3

±3.3

V

Default output limited voltage

Limiter pins open

TA = Full range

±2.8

V

Limiter output offset voltage

(VO − VH) or (VO − VL)

TA = Full range

±15

±50

mV

Limiter input bias current magnitude

(See Note 4)

VO = 0 V

TA = 25°C

35

54

65

µA

Limiter input bias current magnitude

(See Note 4)

VO = 0 V

TA = Full range

31

70

µA

Limiter input impedance

2

1

M

Ω

pF

Limiter feedthrough (See Note 5)

f = 5 MHz

−60

dB

Maximum limiter voltage

±4.3

V

Minimum limiter voltage separation

400

mV

Op amp bias current shift

(See Note 2)

3

µA

Limiter small signal bandwidth

VI = ±2 V, VO < 0.02 Vp-p

450

MHz

Limter slew rate (See Note 6)

100

V/

µs

Limiter step response, overshoot

VI = ±2 V

250

mV

Limiter step response, recovery time

VI = ±2 V

2.4

ns

Linearity guardband (See Note 7)

VO = 2 Vp-p,

f = 5 MHz

30

mV

NOTES:

1. All typical limits are at TA = 25°C unless otherwise specified.

2. Current is considered positive out of node.

3. CMIR tested as < 3dB degradation from minimum CMRR at specified limits.

4. IVH (VH bias current) is positive, and IVL (VL bias current) is negative, under these conditions. See Note 3, Figure 30 and Figure 37.

5. Limiter feedthrough is the ratio of the output magnitude to the sinewave added to VH (or VL) when VIN = 0.

6. VH slew rate conditions are: VIN = +2 V, G = +2, VL = −2 V, VH = step between 2 V and 0 V. VL slew rate conditions are similar.

7. Linearity Guardband is defined for an output sinusoid (f = 5 MHz, VO = 0 VDC

±1 VP-P) centered between the limiter levels (VH and

VL). It is the difference between the limiter level and the peak output voltage where SFDR decreases by 3dB (see Figure 38).