S0113-02

1

2

3

4

5

6

7

14

13

12

11

10

9

8

+

5 V

VINR

VINL

FMT

MD1

MD0

DOUT

BCK

VREF

AGND

VCC

VDD

DGND

SCKI

LRCK

+

C1(1)

+

C2(1)

C4(2)

3.3 V

C5(3)

PCM1808

+

C3(2)

+

4

µs (min)

Mask

X1(4)

PLL170x

DSP

or

Audio

Processor

L-ch IN

R-ch IN

High/Low

Pin

Setting

(5)

PCM1808-Q1

www.ti.com

SLES265A – MARCH 2011 – REVISED AUGUST 2012

APPLICATION INFORMATION

TYPICAL CIRCUIT CONNECTION DIAGRAM

Figure 26 is a typical circuit connection diagram. The antialiasing low-pass filters are integrated on the analog

inputs, VINL and VINR. If the performance of these filters is not adequate for an application, appropriate external

antialiasing filters are needed. A passive RC filter (100

Ω and 0.01 μF to 1 kΩ and 1000 pF) generally is used.

(1)

C1, C2: A 1-

μF electrolytic capacitor gives 2.7 Hz (τ = 1 μF × 60 kΩ) cutoff frequency for the input HPF in normal

operation and requires a power-on settling time with a 60-ms time constant in the power-on initialization period.

(2)

C3, C4: Bypass capacitors, 0.1-

μF ceramic and 10-μF electrolytic, depending on layout and power supply

(3)

C5: 0.1-

μF ceramic and 10-μF electrolytic capacitors are recommended.

(4)

X1: X1 masks the system clock input when using the clock-halt reset function with external control.

(5)

Optional external antialiasing filter could be required, depending on the application.

Figure 26. Typical Circuit Connection Diagram

BOARD DESIGN AND LAYOUT CONSIDERATIONS

VCC, VDD PINS

The digital and analog power supply lines to the PCM1808-Q1 should be bypassed to the corresponding ground

pins with both 0.1-

μF ceramic and 10-μF electrolytic capacitors as close to the pins as possible to maximize the

dynamic performance of the ADC.

AGND, DGND PINS

To maximize the dynamic performance of the PCM1808-Q1, the analog and digital grounds are not internally

connected. These grounds should have low impedance to avoid digital noise feedback into the analog ground.

They should be connected directly to each other under the PCM1808-Q1 package to reduce potential noise

problems.

VINL, VINR PINS

VINL and VINR are single-ended inputs. The antialias low-pass filters are integrated on these inputs to remove the

high-frequency noise outside the audio band. If the performance of these filters is not adequate for an

application, appropriate external antialiasing filters are required. A passive RC filter (100

Ω and 0.01 μF to 1 kΩ

and 1000 pF) is generally used.

Copyright © 2011–2012, Texas Instruments Incorporated

19