ADPA1112 datasheet(18/21 Pages) AD

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Data Sheet

ADPA1112

THEORY OF OPERATION

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Rev. 0 | 18 of 21

The ADPA1112 is a GaN power amplifier with cascaded gain stages

that are biased by a positive drain supply (VDD1 and VDD2) and an

externally applied negative gate voltage (VGG1). A nominal 28V is

applied to the first and second stage drains (VDD1 and VDD2) and

a negative voltage is applied to VGG1 to set the total IDQ to 600mA

nominal.

When biased as described, the ADPA1112 operates in Class AB,

resulting in the maximum PAE at saturation. The ADPA1112 fea-

tures integrated RF chokes for each drain plus on-chip DC blocking

of the RFIN and RFOUT ports.

A portion of the RF output signal is directionally coupled to a diode

for detection of the RF POUT. When the diode is DC biased, the

diode rectifies the coupled RF power and makes it available for

measurement as a DC voltage at VDET. To allow temperature com-

pensation of VDET, an identical and symmetrically located circuit

without the coupled RF power is available through VREF. Taking

the difference of VREF − VDET provides a temperature-compensated

signal that is proportional to the RF output.

Figure 58. Basic Block Diagram

ADPA1112 Datasheet(PDF) 18 Page - Analog Devices