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MP6005 Datasheet(PDF) 18 Page - Monolithic Power Systems

Part # MP6005
Description  High-Efficiency Flyback/Forward Controller with Primary and Secondary-Side Regulation
PDF  30 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP6005 Datasheet(HTML) 18 Page - Monolithic Power Systems

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MP6005
– WIDE-INPUT, HIGH-EFFICIENCY FLYBACK AND FORWARD CONTROLLER
MP6005 Rev. 1.0
www.MonolithicPower.com
18
2/5/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
If VSENSE exceeds the current-limit threshold
(typically 160mV), the MP6005 turns off the
GATE output.
Then the internal oscillator begins the next
cycle and senses the current again. The
MP6005 limits the MOSFET current cycle by
cycle.
Error Amplifier (EA)
In
PSR
mode,
the
MP6005
senses
the
feedback voltage (VFB) during the flyback period
with the feedback pulse signal. The feedback
signal is then held and fed to the error amplifier
(EA). The EA regulates VCOMP based on the
feedback
signal,
and
VCOMP
controls
the
transformer peak current to regulate VOUT.
In SSR mode, the internal EA is disabled and
the COMP pin is pulled up by an internal
resistor. The external optocoupler can be
connected to COMP for VOUT signal feedback.
Light-Load Control
Under light-load conditions in PSR mode, VCOMP
decreases to regulate the low transformer peak
current. If the peak current signal is below
36mV, the
MP6005
stops
decreasing the
transformer current, and instead decreases the
frequency. As a result, the transferred energy
decreases, and VOUT is regulated.
In light-load PSR mode, the MP6005 sets the
minimum frequency above 30kHz. This helps
the device detect the output voltage and avoid
audible noise. The minimum frequency requires
some load to maintain VOUT, so that VOUT does
not rise and trigger over-voltage protection
(OVP).
Under light-load conditions in SSR mode, the
MP6005 maintains a fixed frequency and VCOMP
continues to drop toward the PSM threshold.
Over-Voltage Protection (OVP)
The
MP6005
includes
over-voltage
protection (OVP). If VFB exceeds 125% of VREF,
the MP6005 turns off the GATE signal and
enters hiccup mode. Once the fault has been
removed, the MP6005 turns on again after a
340ms
delay,
and
then
resumes
normal
operation. Connect the FB pin to GND if the
OVP function is not used.OVP sampling has a
blanking time to avoid mistriggering due to the
oscillation of
the
leakage
inductance
and
parasitic capacitance.
Overload Protection (OLP)
The MP6005 limits the peak current cycle by
cycle
under
OCP
conditions.
If
the
load
continues to increase after triggering OCP, VOUT
decreases and the peak current triggers OCP
for each cycle.
The
MP6005
sets
overload
detection
by
monitoring VSENSE. Once the internal soft start is
complete, overload protection (OLP) turns on. If
an OCP signal longer than 4.8ms is detected,
the MP6005 turns off the gate driver. After a
340ms delay, the MP6005 turns on again with
the next cycle. During OLP, a 50µs one-shot
timer is activated after one OCP pulse. This
means if there is one OCP pulse in a 50µs
period, the MP6005 registers this event as
OCP. If the OCP condition is removed before
4.75ms,
the
MP6005
resumes
normal
operation.
Short-Circuit Protection (SCP)
When the output is shorted to GND, the
MP6005 works in OCP mode and the current is
limited cycle by cycle.
If the peak current is not limited by the 160mV
VSENSE in each cycle because of the gate
driver’s minimum on time, the current may run
out of control and the transformer may saturate.
If VSENSE reaches 300mV, the MP6005 turns off
the gate driver and enters hiccup protection
with a 340ms off time.
Once
the
short
circuit
is
removed,
VOUT
recovers after a 340ms delay and then enters
the next cycle.
Soft Start (SS)
The MP6005 employs soft start (SS) by
charging an internal capacitor from a current
source. During the soft-start period, the SS
signal ramps up slowly. In the event of a
command shutdown, thermal shutdown, or
protection condition, the soft-start capacitor is
completely discharged.
In PSR mode, the soft-start signal clamps the
feedback VREF. From 0V to 2V, the feedback
reference soft-start time is typically 4.7ms.
In SSR mode, the soft-start signal clamps VCOMP
until it reaches the switching current level. The
soft-start signal continues to ramp up at the
same rate. VCOMP’s ramp time from 1.5V to 3.5V
is typically 4.7ms.



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