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MP6005 Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP6005 Datasheet(HTML) 3 Page - Monolithic Power Systems |
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3 / 30 page ![]() MP6005 – WIDE-INPUT, HIGH-EFFICIENCY FLYBACK AND FORWARD CONTROLLER MP6005 Rev. 1.0 www.MonolithicPower.com 3 2/5/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Pin Function 1 VCC Internal circuit supply pin. The VCC pin is powered by the internal LDO regulator (LDO) from the VIN pin. To bypass the internal regulator, connect a capacitor from the VCC pin to GND. The VCC capacitor has a 1µF minimum for flyback application, and a 4.7µF minimum for forward application. The VCC pin can also be powered by an external power source to reduce internal low-dropout loss. 2 SENSE Current-sense PSR, output voltage (VOUT) compensation, and frequency dithering setting pin. For function details, see the Output Voltage Compensation section and the Frequency Dithering section on page 17. 3 EN On/off control pin. The EN pin is internally connected to GND through a 2.5 MΩ resistor. 4 VIN Input power supply pin. Connect a bypass capacitor from the VIN pin to GND. 5 MODE PSR/SSR mode and dead time setting pin. For function details, see the Work Mode Detection section on page 15. 6 COMP Loop compensation pin. In PSR mode, the COMP pin is the error amplifier (EA) output. In SSR mode, the COMP pin is pulled up to 5V through an internal 10kΩ resistor. 7 FB Output voltage feedback and OVP monitoring pin. To regulate the output voltage in PSR mode, connect the FB pin to a resistor divider from the SENSE pin. The internal EA is disabled in SSR mode. The FB pin detects the OVP signal in both PSR and SSR mode. If OVP is not used in SSR mode, connect the FB pin to GND. 8 GND Ground. Power return for the controller. 9 SYNC Synchronous MOSFET gate driver pin. 10 GATE Main MOSFET gate driver pin. ABSOLUTE MAXIMUM RATINGS (1) VIN .............................................. -0.3V to +100V VCC, VGATE, VSYNC.......................... -0.3V to +18V VEN .......................................... -0.3V to +6.5V (2) VFB .......................................... -0.5V to +5.5V (3) All other pins ............................... -0.3V to +5.5V EN sinking current .............................. 0.5mA (2) FB sinking current ............................... ±2mA (3) Continuous power dissipation (TA = +25°C) (4) (6) MSOP10 .................................................. 1.62W Junction temperature ................................150°C Lead temperature .....................................260°C Storage temperature ................ -65°C to +150°C Recommended Operating Conditions (5) Supply voltage (VIN) ...........................8V to 80V Maximum VCC, GATE, SYNC voltage ........ 16V Maximum EN sink current ....................0.4mA (2) Maximum FB sink current .....................±1mA (3) Operating junction temp (TJ) ... -40 °C to +125°C Thermal Resistance θJA θJC MSOP10 EV6005-K-00A (6) ................ 77....... 17 … °C/W JESD51-7 (7) ...................... 150...... 65 … °C/W Notes: 1) Exceeding these ratings may damage the device. 2) When VEN is pulled high, a current limited by the external pull- up resistor flows into the EN pin. See the Enable (EN) Control section on page 15 for the EN pin ’s voltage rating description. 3) FB is clamped by the internal circuit. The sink and source currents should be limited. See the Setting the Output Voltage section on page 20 for details. 4) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to- ambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can cause excessive die temperature, and the regulator may go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 5) The device is not guaranteed to function outside of its operating conditions. 6) Measured on EV6005-K-00A, 2-layer 90mmx35mm PCB. 7) The value of θ JA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51-7 and simulated on a specified JEDEC board. They do not represent the performance obtained in actual application. |
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