MP6005

– WIDE-INPUT, HIGH-EFFICIENCY FLYBACK AND FORWARD CONTROLLER

MP6005 Rev. 1.0

www.MonolithicPower.com

26

2/5/2021

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© 2021 MPS. All Rights Reserved.

PCB Layout Guidelines

Efficient layout is critical for stable operation.

Poor layout may result in reduced performance,

excessive EMI, resistive loss, and system

instability. For the best results, see Figure 12,

Figure 13, and Figure 14, and follow the

guidelines below:

For Flyback Applications:

1. For minimal noise and ringing, keep the

input loop as short as possible between the

input

capacitor,

transformer,

MOSFET,

sense resistor, and GND plane.

2. Keep the output loop between the rectifier

diode, output capacitor, and transformer as

short as possible.

3. Make the clamp loop circuit between D2, C5,

and the transformer as small as possible.

4. For the best decoupling, place the VCC

capacitor as close to the VCC pin as

possible.

5. Place the feedback trace far away from any

noise sources, such as the SW pin.

6. Place the COMP components as close to

the COMP pin as possible.

7. Use

a

single-point

connector

between

power GND and signal GND.

4

3

2

1

Q1

D2

T1

R3

C1

C3

U1

R5

C5

R2 R1

R4

C4

D1

C2

VIN

GND

VOUT

VOUT

GND

Via

Top Layer

Bottom Layer

Figure 12: Recommended PCB Layout for

Flyback Application (14)

Note:

14) The recommended PCB layout for flyback applications is

based on the flyback schematic on page 1.

For Forward Applications:

1. For minimal noise and ringing, keep the

input loop between the input capacitor,

transformer (Q1), and sense resistor as

short as possible.

2. Additionally, for minimal noise and ringing,

make the output high-frequency current loop

between D1 and D2 transformers as short

as possible.

3. For the best decoupling, place the VCC

capacitor close to the VCC pin.

4. Place the VCOMP trace far away from any

noise sources, such as SW.

5. Use a single-point connection between

power GND and signal GND.

For more detailed information, refer to the

corresponding evaluation board datasheet.

D2

D1

C2

L1

C5

R5

R1

R2

R4

U3

T1

U2

U1

C6

R6

Q1

C3

R3

C1

Q2

C4

VOUT

VOUT GND

VIN

VIN

GND

Via

Top Layer

Bottom Layer

D3

Figure 13: Recommended PCB Layout for

Forward Application

Figure 14 shows a typical forward layout

schematic.

VIN

GATE

GND

VOUT

C2

C1

VIN

EN

VCC

SENSE

FB

COMP

Q1

R3

U1

C3

MODE

SYNC

Q2

R6

D3

Sync

Gate

Sync

Gate

C5

R5

Q2

R1

R2

R4

TL431

U2A

U2B

C4

C6

D1

D2

T1

Figure 14: Typical Forward Application Layout

Schematic