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TPL5010 Datasheet(PDF) 11 Page - Texas Instruments

Part # TPL5010
Description  TPL5010 Nano-Power System Timer With Watchdog Function
PDF  27 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPL5010 Datasheet(HTML) 11 Page - Texas Instruments

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WAKE
DONE
RSTn
DELAY/
M_RST
ttM_RSTt
ttDBt
ttRSTn+ tIPt
ttIPt
ttM_RSTt
NOT VALID M_RST
VALID M_RST
ANY RESET
11
TPL5010
www.ti.com
SNAS651A – JANUARY 2015 – REVISED SEPTEMBER 2018
Product Folder Links: TPL5010
Submit Documentation Feedback
Copyright © 2015–2018, Texas Instruments Incorporated
Programming (continued)
8.5.2 Manual Reset
If VDD is connected to the DELAY/M_RST pin, the TPL5010 recognizes this as a manual reset condition. In this
case, the time interval is not set. If the manual reset is asserted during the POR or during the reading procedure,
the reading procedure is aborted and is restarted as soon as the manual reset switch is released. A pulse on the
DELAY/M_RST pin is recognized as a valid manual reset only if it lasts at least 20 ms (observation time is 30
ms).
A valid manual reset resets all the counters inside the TPL5010. The counters restart only when the high digital
voltage at DELAY/M_RST is removed and the next tRSTn is elapsed.
Figure 10. Manual Reset
8.5.2.1 DELAY/M_RST
A resistance in the range between 500 Ω and 170 kΩ needs to be connected to select a valid time interval. At the
POR and during the reading of the resistance the DELAY/M_RST is connected to an analog signal chain though
a mux. After the reading of the resistance the analog circuit is switched off and the DELAY/RST is connected to
a digital circuit.
The manual reset detection is supported with a de-bounce feature which makes the TPL5010 insensitive to the
glitches on the DELAY/M_RST pin. When a valid manual reset signal is asserted on the DELAY/M_RST pin, the
RSTn signal is asserted LOW after a delay of tM_RST. It remains LOW after a valid manual reset is asserted + tDB
+ tRSTn. Due to the asynchronous nature of the manual reset signal and its arbitrary duration, the LOW status of
the RSTn signal maybe affected by an uncertainty of about ±5 ms.
A valid manual reset puts all the digital output signals at their default values:
•
WAKE = LOW
•
RSTn = asserted LOW
8.5.2.2 Circuitry
The manual reset may be implemented using a switch (momentary mechanical action). The TPL5010 offers two
possible approaches according to the power consumption constraints of the application.



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