ADS1602IPFBT datasheet(21/30 Pages) TI2

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DGND

AVDD

AGND

AVDD

AGND

AVDD

47 F

4.7 F

1 F

0.1 F

1 F

4.7 F

10kW

ADS1602

Ifusingseparateanalogand

digitalgroundplanes,connect

togetherontheADS1602PCB.

DGND

AGND

AVDD

IOVDD

DVDD

ADS1602

www.ti.com

SBAS341E

– DECEMBER 2004 – REVISED OCTOBER 2011

POWER DOWN (PD)

POWER SUPPLIES

When not in use, the ADS1602 can be powered down

Three supplies are used on the ADS1602: analog

by taking the PD pin low. All circuitry is shut down,

(AVDD), digital (DVDD), and digital I/O (IOVDD).

including the voltage reference. To minimize the

Each supply must be suitably bypassed to achieve

digital current during power down, stop the clock

the best performance. It is recommended that a 1

μF

signal supplied to the CLK input. There is an internal

and 0.1

μF ceramic capacitor be placed as close to

pull-up resistor of 170k

Ω on the PD pin, but it is

each supply pin as possible. Connect each supply-pin

recommended that this pin be connected to IOVDD if

bypass capacitor to the associated ground, as shown

not used. Make sure to allow time for the reference to

in Figure 53. Each main supply bus should also be

start up after exiting power-down mode. The internal

bypassed with a bank of capacitors from 47

μF to

reference typically requires 15ms. After the reference

0.1

μF, as shown. The I/O and digital supplies (IOVDD

has stabilized, allow at least 100 conversions for the

and DVDD) can be connected together when using

modulator and digital filter to settle before retrieving

the same voltage. In this case, only one bank of 47

μF

data.

to 0.1

μF capacitors is needed on the main supply

bus, though each supply pin must still be bypassed

with a 1

μF and 0.1μF ceramic capacitor.

NOTE: CP = 1µF || 0.1µF.

Figure 53. Recommended Power-Supply Bypassing

ADS1602IPFBT Datasheet(PDF) 21 Page - Texas Instruments

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