ADS5424

SLWS157B − JANUARY 2005 − REVISED JANUARY 2010

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5

ELECTRICAL CHARACTERISTICS

Over full temperature range (TMIN = −40°C to TMAX = 85°C), sampling rate = 105 MSPS, 50% clock duty cycle, AVDD = 5 V, DRVDD = 3.3 V,

−1 dBFS differential input, and 3 VPP differential sinusoidal clock, unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fIN = 10 MHz

100

dBc

fIN = 30 MHz

105

dBc

fIN = 50 MHz

98

dBc

Second harmonic, HD2

fIN = 70 MHz

98

dBc

Second harmonic, HD2

fIN = 100 MHz

98

dBc

fIN = 170 MHz

98

dBc

fIN = 230 MHz

96

dBc

fIN = 10 MHz

93

dBc

fIN = 30 MHz

95

dBc

fIN = 50 MHz

93

dBc

Third harmonic, HD3

fIN = 100 MHz

87

dBc

fIN = 170 MHz

73

dBc

fIN = 230 MHz

64

dBc

fIN = 10 MHz

93

dBc

fIN = 30 MHz

95

dBc

fIN = 50 MHz

93

dBc

Worst-harmonic / spur (other than HD2

fIN = 70 MHz

88

dBc

and HD3)

fIN = 100 MHz

88

dBc

fIN = 170 MHz

88

dBc

fIN = 230 MHz

88

dBc

RMS idle channel noise

Input pins tied together

0.9

LSB

DIGITAL CHARACTERISTICS

Over full temperature range (TMIN = −40°C to TMAX = 85°C), AVDD = 5 V, DRVDD = 3.3 V, unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Digital Outputs

Low-level output voltage

CLOAD = 10 pF(1)

0.1

0.6

V

High-level output voltage

CLOAD = 10 pF(1)

2.6

3.2

V

Output capacitance

3

pF

DMID

DRVDD/2

V

(1) Equivalent capacitance to ground of (load + parasitics of transmission lines).