LM27966 datasheet(4/13 Pages) NSC

4 / 13 page

Electrical Characteristics (Notes 2, 8) (Continued)

Limits in standard typeface are for T

J = 25˚C, and limits in boldface type apply over the full operating temperature range. Un-

less otherwise specified: V

IN = 3.6V; VRESET =VIN; VIO = 1.8V VDx = 0.4V; VDAUX = 0.4V; RSET = 16.9kΩ;Dx =DAUX =

Fullscale Current; EN-MAIN, EN-D5 Bits = “1”; C1=C2=1.0µF, C

IN=COUT=1.0µF; Specifications related to output current(s) and

current setting pins (I

Dx and ISET) apply to Main Display and Auxiliary LED. (Note 9)

Symbol

Parameter

Condition

Min

Typ

Max

Units

RESET

Reset Voltage Thresholds

2.7V

≤ V

≤ 5.5V

Reset

0.45

Normal

Operation

1.2

2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO)

Serial Bus Voltage Level

2.7V

≤ V

≤ 5.5V(Note 13)

1.4

Input Logic Low "0"

2.7V

≤ V

≤ 5.5V, VIO = 3.0V

0.3 x

Input Logic High "1"

2.7V

≤ V

≤ 5.5V, VIO = 3.0V

0.7 x

Output Logic Low "0"

LOAD = 3mA

400

2C Compatible Interface Timing Specifications (SCL, SDIO, VIO)(Note 14)

SCL (Clock Period)

2.5

µs

Data In Setup Time to SCL High

100

Data Out stable After SCL Low

SDIO Low Setup Time to SCL Low

(Start)

100

SDIO High Hold Time After SCL

High (Stop)

100

20190113

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of

the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the

Electrical Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 170˚C (typ.) and disengages at TJ =

165˚C (typ.).

Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1187: Leadless Leadframe Package

(AN-1187).

Note 5: The human body model is a 100pF capacitor discharged through 1.5k

Ω resistor into each pin. (MIL-STD-883 3015.7)

Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be

derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 100˚C), the maximum power

dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the

following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX).

Note 7: Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power dissipation exists,

special care must be paid to thermal dissipation issues in board design. For more information, please refer to National Semiconductor Application Note 1187:

Leadless Leadframe Package (AN-1187).

Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.

Note 9: CIN,CPOUT,C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics

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