line during the 9th clock pulse, signifying an acknowledge.

The LM27966 generates an acknowledge after each byte

has been received.

After the START condition, the I

address. This address is seven bits long followed by an

eighth bit which is a data direction bit (R/W). The LM27966

address is 36h. For the eighth bit, a “0” indicates a WRITE

and a “1” indicates a READ. The second byte selects the

register to which the data will be written. The third byte

contains data to write to the selected register.

I

The chip address for LM27966 is 0110110, or 36h.

INTERNAL REGISTERS OF LM27966

Register

Internal Hex

Address

Power On

Value

General Purpose

Register

10h

0010 0000

Main Display

Brightness Control

Register

A0h

1110 0000

Auxiliary LED

Brightness Control

Register

C0h

1111 1100

Note: EN-MAIN: Enables Dx LED drivers (Main Display)

T0: Must be set to ’0’

EN-D5: Enables D5 LED voltage sense

T1: Must be set to ’0’

Note: Dx4-Dx0: Sets Brightness for Dx pins (Main Display). 11111=Fullscale

20190112

FIGURE 3. Write Cycle

w = write (SDIO = "0")

r = read (SDIO = "1")

ack = acknowledge (SDIO pulled down by either master or slave)

rs = repeated start

id = chip address, 36h for LM27966

20190109

FIGURE 4. Chip Address

20190108

FIGURE 5. General Purpose Register Description

Internal Hex Address: 10h

20190105

20190107

FIGURE 6. Brightness Control Register Description

Internal Hex Address: 0xA0 (Main Display), 0xC0

(D

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