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UCC28061 Datasheet(PDF) 13 Page - Texas Instruments

Part # UCC28061
Description  Natural Interleaving™ Transition-Mode PFC Controller With Improved Audible Noise Immunity
PDF  35 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

UCC28061 Datasheet(HTML) 13 Page - Texas Instruments

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Time
ns
-
14
12
10
-
2
0
20
40
60
80
100
120
140
8
6
4
2
0
V
=20Vand12V
C
=4.7nF
CC
LOAD
GDSinkCurrent:
V
=20V
V
=12V
CC
CC
GDVoltage:
V
=20V
V
=12V
CC
CC
3.0
2.5
2.0
-
1.0
1.5
1.0
0.5
0
-
0.5
Time
ns
-
7
6
5
-
1
-
25
50
100
150
200
250
300
4
3
2
1
0
0
14
12
10
-
2
8
6
4
2
0
C
=4.7nF
LOAD
ZCDInputVoltage
GDOutput:
T = 40 C
T =+25 C
T =+125 C
J
-
°
J
J
°
°
Time
ns
-
500
400
300
-
300
-
25
50
100
150
200
250
300
200
100
0
-
100
-
200
0
14
12
10
-
2
8
6
4
2
0
C
=4.7nF
LOAD
CSInput
Voltage
GDOutput:
T = 40 C
T =+25 C
T =+125 C
J
-
°
J
J
°
°
V
BiasSupplyVoltage
V
VCC -
-
15
14
13
12
11
10
8
10
11
12
13
14
15
16
17
18
19
20
9
R
=2.7kW
LOAD
T = 40 C
-
°
J
T =+25 C
J
°
T =+125 C
J
°
UCC28061-Q1
www.ti.com
SLUSB01 – MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, RTSET = 133 kΩ; all voltages
are with respect to GND, all outputs unloaded, TJ = TA = +25°C, and currents are positive into and negative out of the
specified terminal, unless otherwise noted.
GATE DRIVE FALLING
GATE DRIVE RISING
vs
vs
TIME
TIME AND DELAY FROM ZCD INPUT
Figure 13.
Figure 14.
GATE DRIVE FALLING
GATE DRIVE OUTPUT HIGH
vs
vs
TIME AND DELAY FROM CS INPUT
VCC
Figure 15.
Figure 16.
Copyright © 2012, Texas Instruments Incorporated
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Product Folder Link(s): UCC28061-Q1



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