IPFM Peak =

VIN

64:

117 mA +

(typ)

IMODE <

VIN

50:

26 mA +

(typ)

12

LM3670

SNVS250F – NOVEMBER 2004 – REVISED FEBRUARY 2016

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7.4 Device Functional Modes

7.4.1 PWM Operation

During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This

allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional

to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is

introduced.

7.4.1.1 Internal Synchronous Rectification

While in PWM mode, the LM3670 uses an internal NFET as a synchronous rectifier to reduce rectifier forward

voltage drop and associated power loss. Synchronous rectification provides a significant improvement in

efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier

diode.

7.4.1.2 Current Limiting

A current limit feature allows the LM3670 to protect itself and external components during overload conditions

PWM mode implements cycle-by-cycle current limiting using an internal comparator that trips at 620 mA (typical).

7.4.2 PFM Operation

At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply

current to maintain high efficiency.

The part automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or

more clock cycles:

1. The inductor current becomes discontinuous

2. The peak PMOS switch current drops below the IMODE level:

(4)

During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage

in PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load.

The PFM comparator senses the output voltage via the feedback pin and control the switching of the output

FETs such that the output voltage ramps between 0.8% and 1.6% (typical) above the nominal PWM output

voltage. If the output voltage is below the high PFM comparator threshold, the PMOS power switch is turned on.

It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the IPFM level

set for PFM mode. The peak current in PFM mode is:

(5)

Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps

to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output

voltage is below the high PFM comparator threshold (see Figure 16), the PMOS switch is again turned on and

the cycle is repeated until the output reaches the desired level. Once the output reaches the high PFM threshold,

the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are

turned off and the part enters an extremely low power mode. Quiescent supply current during this sleep mode is

less than 30 µA, which allows the part to achieve high efficiencies under extremely light load conditions. When

the output drops below the low PFM threshold, the cycle repeats to restore the output voltage to approximately

1.6% above the nominal PWM output voltage.

If the load current increases during PFM mode (see Figure 16) causing the output voltage to fall below the ‘low2’

PFM threshold, the part automatically transitions into fixed-frequency PWM mode.