0.9

1.0

1.10

45

50

55

TEMPERATURE (

oC)

-50

0

50

100

150

|

|

490

492

494

496

498

500

502

504

506

508

510

-50

0

50

100

150

TEMPERATURE (

oC)

LM5034

SNVS347A – FEBRUARY 2005 – REVISED APRIL 2013

www.ti.com

Typical Performance Characteristics (continued)

Soft-start Pin Current vs. Temperature

Current Limit Threshold at CS1, CS2 vs. Temperature

Figure 18.

Figure 19.

FUNCTIONAL DESCRIPTION

The LM5034 contains all the features necessary to implement two independently regulated current mode dc/dc

converters, or a single high current converter comprised of two parallel interleaved channels using the Forward/

Active Clamp topology. The two controllers operate 180° out of phase from a common oscillator, thereby

reducing input ripple current. Each regulator channel contains a complete PWM controller, current sense input,

soft-start circuit, main gate driver output, and active clamp driver output. Common to both channels are the

startup and VCC regulators, line under-voltage lockout, 2 MHz capable oscillator, maximum duty cycle control,

overlap time setting, and the hiccup mode fault protection circuit.

The main gate driver outputs (OUT1, OUT2) are designed to drive N-channel MOSFETs. Their compound

configuration reduces the turn-off-time, thereby reducing switching losses. The active clamp outputs (AC1, AC2)

are designed to drive P-channel MOSFETs. The adjustable overlap time of the active clamp outputs relative to

the main outputs produces a deadtime between the main switch and the P-channel active clamp switch.

Additional features include thermal shutdown, slope compensation, and the oscillator synchronization capability.

Line Under-Voltage Lock Out, UVLO, Shutdown

The LM5034 contains a line under-voltage lockout circuit (UVLO) designed to enable the VCC regulator and

output drivers when the system voltage (VPWR) exceeds the desired level (see Figure 20). VPWR is the voltage

normally applied to the transformer primary, and usually connected to the VIN pin (see the schematic on Page

1). The threshold at the UVLO comparator is 1.25V. An external resistor divider connected from VPWR to ground

provides 1.25V at the UVLO pin when VPWR is increased to the desired turn-on threshold. When VPWR is below

the threshold the VCC regulator and output drivers are disabled, and the internal 20 µA current source is off.

When VPWR reaches the threshold, the comparator output switches low to enable the internal circuits and the 20

µA current source. The 20 µA flows into the external divider’s junction, raising the voltage at UVLO, thereby

providing hysteresis. Internally the voltage at UVLO also drives the Maximum Duty Cycle Limiter circuit

(described below), which may influence the values chosen for the UVLO pin resistors. At maximum VPWR, the

voltage at UVLO should not exceed 6V. Refer to Applications Information for a procedure to calculate the

resistors values.

The LM5034 controllers can be shutdown by forcing the UVLO pin below 1.25V with an external switch. When

the UVLO pin is low, the outputs and the VCC regulator are disabled, and the LM5034 enters a low power mode.

If the VCC pins are not powered from an external source, the current into VIN drops to a nominal 500 µA. If the

VCC pins are powered from an external source, the current into VIN is nominally 50 µA, and the current into the

VCC pins is approximately 4.3 mA. To disable one regulator without affecting the other, see the description of the

Soft-start section.

12

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