LM8328 datasheet(21/56 Pages) TI2

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LM8328

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SNLS328A – AUGUST 2011 – REVISED MARCH 2013

PWM TIMER CONTROL REGISTERS

The LM8328 provides three host-programmable PWM outputs useful for smooth LED brightness modulation. All

PWM timer control registers are mapped in the range from 0x60 to 0x7F. This paragraph describes the functions

of the associated registers down to the bit level.

TIMCFGx - PWM Timer 0, 1 and 2 Configuration Registers

Table 30. TIMCFGx - PWM Timer 0, 1 and 2 Configuration Registers

Address

Type

TIMCFG0

0x60

This register configures interrupt masking and handles PWM start/stop

TIMCFG1

0x68

R/W

control of the associated PWM channel.

TIMCFG2

0x70

Bit - Name

Bit

Default

Bit Function

(x = 0, 1 or 2)

Interrupt mask for PWM CYCIRQx (see register TIMRIS)

CYCIRQxMSK

0x0

0: interrupt enabled

1: interrupt masked

(reserved)

3:0

0x0

(reserved)

PWMCFGx - PWM Timer 0, 1 and 2 Configuration Control Registers

Table 31. PWMCFGx - PWM Timer 0, 1 and 2 Configuration Control Registers

Address

Type

This register defines interrupt masking and the output behavior for the

PWMCFG0

0x61

associated PWM channel.

PWMCFG1

0x69

R/W

PGEx is used to start and stop the PWM script execution.

PWMENx sets the PWM output to either reflect the generated pattern or

PWMCFG2

0x71

the value configured in PWMPOLx.

Bit - Name

Bit

Default

Bit Function

(x = 0, 1 or 2)

Mask for CDIRQx

CDIRQxMSK

0x0

0: CDIRQx enabled

1: CDIRQx disabled/masked

Pattern Generator Enable. Start/Stop PWM command processing for this

channel. Script execution is started always from beginning.

PGEx

0x0

0: Pattern Generator disabled

1: Pattern Generator enabled

0: PWM disabled. PWM timer output assumes value programmed in

PWMPOL.

PWMENx

0x0

1: PWM enabled

Off-state of PWM output, when PWMEN=0.

PWMPOLx

0x0

0: PWM off-state is low

1: PWM off-state is high

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