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TMS28F200AST Datasheet(PDF) 65 Page - Texas Instruments

Part # TMS28F200AST
Description  262144 BY 8-BIT/131072 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
PDF  79 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS28F200AST Datasheet(HTML) 65 Page - Texas Instruments

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TMS28F002Axy, TMS28F200Axy
262144 BY 8-BIT/131072 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS826D – JANUARY 1996 – REVISED SEPTEMBER 1997
65
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
timing requirements for TMS28F002AZy and TMS28F200AZy (commercial and extended
temperature ranges)
write/erase operations — W-controlled writes
ALT
’28F002AZy 60
’28F200AZy 60
’28F002AZy 70
’28F200AZy 70
’28F002AZy80
’28F200AZy80
ALT.
SYMBOL
5-V VCC
RANGE
5-V VCC
RANGE
5-V VCC
RANGE
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tc( W )
Cycle time, write
tAVAV
60
70
80
ns
tc( W )OP
Cycle time, duration of programming
operation
tWHQV1
6
6
6
µs
tc( W )ERB
Cycle time, erase operation (boot block)
tWHQV2
0.3
0.3
0.3
s
tc( W )ERP
Cycle time, erase operation (parameter
block)
tWHQV3
0.3
0.3
0.3
s
tc( W )ERM
Cycle time, erase operation (main block)
tWHQV4
0.6
0.6
0.6
s
td(RPR)
Delay time, boot-block relock
tPHBR
100
100
100
ns
th(A)
Hold time, A0 – A16 (see Note 15)
tWHAX
0
0
0
ns
th(D)
Hold time, DQ valid
tWHDX
0
0
0
ns
th(E)
Hold time, E
tWHEH
0
0
0
ns
th( VPP)
Hold time, VPP from valid status-register bit
tQVVL
0
0
0
ns
th(RP)
Hold time, RP at VHH from valid
status-register bit
tQVPH
0
0
0
ns
tsu(A)
Setup time, A0 – A16 (see Note 15)
tAVWH
50
50
50
ns
tsu(D)
Setup time, DQ
tDVWH
50
50
50
ns
tsu(E)
Setup time, E before write operation
tELWL
0
0
0
ns
tsu(RP)
Setup time, RP at VHH to W going high
tPHHWH
100
100
100
ns
tsu( VPP)1
Setup time, VPP to W going high
tVPWH
100
100
100
ns
tw( W )
Pulse duration, W low
tWLWH
50
50
50
ns
tw( WH)
Pulse duration, W high
tWHWL
10
20
30
ns
trec(RPHW)
Recovery time, RP high to W going low
tPHWL
450
450
450
ns
NOTE 15: A–1 – A16 for byte-wide



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